ZL

Zhijiong Luo

IBM: 72 patents #999 of 70,183Top 2%
AL Aspiring Sky Co. Limited: 12 patents #1 of 6Top 20%
CM Chartered Semiconductor Manufacturing: 11 patents #62 of 840Top 8%
Samsung: 5 patents #22,466 of 75,807Top 30%
ED Empire Technology Development: 5 patents #102 of 547Top 20%
GP Globalfoundries Singapore Pte.: 5 patents #141 of 828Top 20%
BC Beijing Nmc Co.: 1 patents #3 of 20Top 15%
📍 Poughkeepsie, NY: #11 of 1,613 inventorsTop 1%
🗺 New York: #160 of 115,490 inventorsTop 1%
Overall (All Time): #3,690 of 4,157,543Top 1%
192
Patents All Time

Issued Patents All Time

Showing 176–192 of 192 patents

Patent #TitleCo-InventorsDate
7485524 MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same Yung Fu Chong, Judson R. Holt, Zhao Lun, Huilong Zhu 2009-02-03
7482656 Method and structure to form self-aligned selective-SOI Yung Fu Chong, Kevin K. Dezfulian, Huilong Zhu, Judson R. Holt 2009-01-27
7473608 N-channel MOSFETs comprising dual stressors, and methods for forming the same Jinghong Li, Yaocheng Liu, Anita Madan, Nivo Rovedo 2009-01-06
7442586 SOI substrate and SOI device, and method for forming the same Thomas W. Dyer 2008-10-28
7442619 Method of forming substantially L-shaped silicide contact for a semiconductor device Huilong Zhu, Yung Fu Chong, Hung Y. Ng, Kern Rim, Nivo Rovedo 2008-10-28
7413961 Method of fabricating a transistor structure Yung Fu Chong, Kevin K. Dezfulian, Huilong Zhu 2008-08-19
7410852 Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistors Scott D. Allen, Cyril Cabral, Jr., Kevin K. Dezfulian, Sunfei Fang, Brian J. Greene +6 more 2008-08-12
7393751 Semiconductor structure including laminated isolation region Huilong Zhu 2008-07-01
7385258 Transistors having v-shape source/drain metal contacts Huilong Zhu, Haining Yang 2008-06-10
7317204 Test structure of semiconductor device Min-Chul Sun, Ja-Hum Ku, Brian J. Greene, Manfred Eller, Wee Lang Tan +1 more 2008-01-08
7309901 Field effect transistors (FETs) with multiple and/or staircase silicide Xiangdong Chen, Sunfei Fang, Haining Yang, Huilong Zhu 2007-12-18
7279758 N-channel MOSFETs comprising dual stressors, and methods for forming the same Jinghong Li, Yaocheng Liu, Anita Madan, Nivo Rovedo 2007-10-09
7220662 Fully silicided field effect transistors Huilong Zhu, Sunfei Fang 2007-05-22
7112481 Method for forming self-aligned dual salicide in CMOS technologies Sunfei Fang, Cyril Cabral, Jr., Chester T. Dziobkowski, John J. Ellis-Monaghan, Christian Lavoie +3 more 2006-09-26
7105440 Self-forming metal silicide gate for CMOS devices Sunfei Fang, Huilong Zhu 2006-09-12
7067368 Method for forming self-aligned dual salicide in CMOS technologies Sunfei Fang, Cyril Cabral, Jr., Chester T. Dziobkowski, John J. Ellis-Monaghan, Christian Lavoie +3 more 2006-06-27
7064025 Method for forming self-aligned dual salicide in CMOS technologies Sunfei Fang, Cyril Cabral, Jr., Chester T. Dziobkowski, John J. Ellis-Monaghan, Christian Lavoie +3 more 2006-06-20