Issued Patents All Time
Showing 1–25 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12142673 | Transistor with wrap-around extrinsic base | Xinshu Cai, Shyue Seng Tan, Vibhor Jain, John J. Pekarik, Kien Seen Daniel Chong +3 more | 2024-11-12 |
| 11855195 | Transistor with wrap-around extrinsic base | Xinshu Cai, Shyue Seng Tan, Vibhor Jain, John J. Pekarik, Kien Seen Daniel Chong +3 more | 2023-12-26 |
| 11855196 | Transistor with wrap-around extrinsic base | Xinshu Cai, Shyue Seng Tan, Vibhor Jain, John J. Pekarik, Kien Seen Daniel Chong +3 more | 2023-12-26 |
| 11776844 | Contact via structures of semiconductor devices | Rui Tze Toh, Fangyue Liu | 2023-10-03 |
| 10566441 | Methods of forming integrated circuits with solutions to interlayer dielectric void formation between gate structures | Hao Nong, Liang Li, Chiew Wah Yap, Ting Huo, Yun Ling Tan | 2020-02-18 |
| 10395987 | Transistor with source-drain silicide pullback | Chia Ching Yeo, Kiok Boone Elgin Quek, Khee Yong Lim, Jae-Han Cha | 2019-08-27 |
| 10079316 | Split gate embedded memory technology and method of manufacturing thereof | Danny Pak-Chum Shum, Fook Hong Lee | 2018-09-18 |
| 9620418 | Methods for fabricating integrated circuits with improved active regions | Liang Li, Wei Lu, Lian Choo Goh, Fangyue Liu, Alex See | 2017-04-11 |
| 9390962 | Methods for fabricating device substrates and integrated circuits | Lian Hoon Ko | 2016-07-12 |
| 9257554 | Split gate embedded memory technology and method of manufacturing thereof | Danny Pak-Chum Shum, Fook Hong Lee | 2016-02-09 |
| 8912567 | Strained channel transistor and method of fabrication thereof | Zhijiong Luo, Judson R. Holt | 2014-12-16 |
| 8643119 | Substantially L-shaped silicide for contact | Zhijiong Luo, Huilong Zhu, Hung Y. Ng, Kern Rim, Nivo Rovedo | 2014-02-04 |
| 8450775 | Method to control source/drain stressor profiles for stress engineering | Zhijiong Luo, Judson R. Holt | 2013-05-28 |
| 8324031 | Diffusion barrier and method of formation thereof | Shyue Seng Tan, Lee-Wee Teo, Elgin Quek, Sanford Chu | 2012-12-04 |
| 8288825 | Formation of raised source/drain structures in NFET with embedded SiGe in PFET | Zhijiong Luo, Joo-chan Kim, Judson R. Holt | 2012-10-16 |
| 8211761 | Semiconductor system using germanium condensation | Shyue Seng Tan, Lee-Wee Teo | 2012-07-03 |
| 8138055 | Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same | Jin-Ping Han, Alois Gutmann, Roman Knoefler, Jiang Yan, Chris Stapelmann +1 more | 2012-03-20 |
| 8017487 | Method to control source/drain stressor profiles for stress engineering | Zhijiong Luo, Judson R. Holt | 2011-09-13 |
| 8017472 | CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof | Jin-Ping Han | 2011-09-13 |
| 7972921 | Integrated circuit isolation system | Zhijiong Luo | 2011-07-05 |
| 7939413 | Embedded stressor structure and process | Zhijiong Luo, Joo-chan Kim, Brian J. Greene, Kern Rim | 2011-05-10 |
| 7892905 | Formation of strained Si channel and Si1-xGex source/drain structures using laser annealing | Kuang Kian Ong, Kin Leong Pey, King-Jien Chui, Ganesh Samudra, Yee-Chia Yeo | 2011-02-22 |
| 7888224 | Method for forming a shallow junction region using defect engineering and laser annealing | Kuang Kian Ong, Sai-Hooi Yeong, Kin Leong Pey, Lap Chan | 2011-02-15 |
| 7800182 | Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same | Jin-Ping Han, Alois Gutmann, Roman Knoefler, Jiang Yan, Chris Stapelmann +1 more | 2010-09-21 |
| 7772071 | Strained channel transistor and method of fabrication thereof | Zhijiong Luo, Judson R. Holt | 2010-08-10 |