Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11742283 | Integrated thin film resistor and memory device | Kah Wee Gan, Benfu Lin | 2023-08-29 |
| 11610837 | Via structures of passive semiconductor devices | Xuesong Rao, Benfu Lin, Bo Li, Chengang Feng, Yudi Setiawan | 2023-03-21 |
| 11315876 | Thin film conductive material with conductive etch stop layer | Xuesong Rao, Yudi Setiawan, Siow Lee Chwa | 2022-04-26 |
| 10784332 | Methods for producing integrated circuits with magnets and a wet etchant for the same | Liang Li, Kai Hung Alex See, Lulu Peng, Donald R. Disney | 2020-09-22 |
| 10566441 | Methods of forming integrated circuits with solutions to interlayer dielectric void formation between gate structures | Hao Nong, Liang Li, Chiew Wah Yap, Ting Huo, Yung Fu Chong | 2020-02-18 |
| 10410854 | Method and device for reducing contamination for reliable bond pads | Honghui Mou, Xiaodong Li, Alex See, Liang Li | 2019-09-10 |
| 10115625 | Methods for removal of hard mask | Liang Li, Hai Cong, Changwei Pei, Alex See | 2018-10-30 |
| 9548371 | Integrated circuits having nickel silicide contacts and methods for fabricating the same | Jingyan Huang, Chuan-Hua Wang, Chim Seng Seet, Alex See | 2017-01-17 |
| 9230886 | Method for forming through silicon via with wafer backside protection | Lup San Leong, Zheng Zou, Alex See, Hai Cong, Xuesong Rao +1 more | 2016-01-05 |
| 8940637 | Method for forming through silicon via with wafer backside protection | Lup San Leong, Zheng Zou, Alex See, Hai Cong, Xuesong Rao +1 more | 2015-01-27 |
| 8860142 | Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction | Debora Chyiu Hyia Poon, Alex See, Francis Benistant, Benjamin Colombeau, Mei Sheng Zhou +1 more | 2014-10-14 |
| 8853796 | High-K metal gate device | Young Way Teh, Michael V. Aquilino, Arifuzzaman (Arif) Sheikh, Hao Zhang, Deleep R. Nair +1 more | 2014-10-07 |
| 8828858 | Spacer profile engineering using films with continuously increased etch rate from inner to outer surface | Xuesong Rao, Chim Seng Seet, Hai Cong, Zheng Zou, Alex See +2 more | 2014-09-09 |
| 8492236 | Step-like spacer profile | Xuesong Rao, Chim Seng Seet, Hai Cong, Zheng Zou, Alex See +3 more | 2013-07-23 |
| 8293544 | Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction | Debora Chyiu Hyia Poon, Alex See, Francis Benistant, Benjamin Colombeau, Mei Sheng Zhou +1 more | 2012-10-23 |
| 7326609 | Semiconductor device and fabrication method | Purakh Raj Verma, Liang-Choo Hsia, Dong Kyun Sohn, Guowei Zhang, Chew Hoe Ang +3 more | 2008-02-05 |
| 7176094 | Ultra-thin gate oxide through post decoupled plasma nitridation anneal | Dong Zhong, Chew Hoe Ang, Jia Zhen Zheng | 2007-02-13 |