Issued Patents All Time
Showing 1–25 of 177 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10985084 | Integrated III-V device and driver device packages with improved heat removal and methods for fabricating the same | — | 2021-04-20 |
| 10825888 | 3-dimensional printing process for integrated magnetics | Lulu Peng, Lawrence Selvaraj Susai, Rajesh S. Nair | 2020-11-03 |
| 10784332 | Methods for producing integrated circuits with magnets and a wet etchant for the same | Liang Li, Yun Ling Tan, Kai Hung Alex See, Lulu Peng | 2020-09-22 |
| 10643990 | Ultra-high voltage resistor | Jongjib Kim, Wen-Cheng Lin | 2020-05-05 |
| 10608108 | Extended drain MOSFETs (EDMOS) | Chia Ching Yeo, Khee Yong Lim, Kiok Boone Elgin Quek | 2020-03-31 |
| 10453830 | Integrated III-V device and driver device units and methods for fabricating the same | — | 2019-10-22 |
| 10446639 | 3-dimensional printing process for integrated magnetics | Lulu Peng, Lawrence Selvaraj Susai, Rajesh S. Nair | 2019-10-15 |
| 10297711 | Integrated LED and LED driver units and methods for fabricating the same | — | 2019-05-21 |
| 10074716 | Saucer-shaped isolation structures for semiconductor devices | Wai Tien Chan, Richard K. Williams | 2018-09-11 |
| 10068694 | Integrated circuits and coupled inductors with isotropic magnetic cores, and methods for fabricating the same | Lulu Peng | 2018-09-04 |
| 9991230 | Integrated circuits and methods for fabricating integrated circuits and electrical interconnects for III-V semiconductor devices | — | 2018-06-05 |
| 9966186 | Integrated circuits and coupled inductors with isotropic magnetic cores, and methods for fabricating the same | Lulu Peng | 2018-05-08 |
| 9905640 | Isolation structures for semiconductor devices including trenches containing conductive material | Wai Tien Chan, Richard K. Williams | 2018-02-27 |
| 9741845 | Lateral high voltage transistor | Jongjib Kim, Wen-Cheng Lin | 2017-08-22 |
| 9735102 | High voltage device | Lulu Peng | 2017-08-15 |
| 9484470 | Method of fabricating a GaN P-i-N diode using implantation | Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Richard J. Brown | 2016-11-01 |
| 9391179 | Vertical GaN JFET with low gate-drain capacitance and high gate-source capacitance | — | 2016-07-12 |
| 9324809 | Method and system for interleaved boost converter with co-packaged gallium nitride power devices | Hemal N. Shah | 2016-04-26 |
| 9324645 | Method and system for co-packaging vertical gallium nitride power devices | Hemal N. Shah | 2016-04-26 |
| 9324607 | GaN power device with solderable back metal | Patrick James Lazlo Hyland, Brian Alvarez | 2016-04-26 |
| 9318619 | Vertical gallium nitride JFET with gate and source electrodes on regrown gate | Hui Nie, Isik C. Kizilyalli, Richard J. Brown | 2016-04-19 |
| 9281393 | Super junction semiconductor device and associated fabrication method | Rongyao Ma, Tiesheng Li, Lei Zhang | 2016-03-08 |
| 9257504 | Isolation structures for semiconductor devices | Wai Tien Chan, Richard K. Williams | 2016-02-09 |
| 9257500 | Vertical gallium nitride power device with breakdown voltage control | — | 2016-02-09 |
| 9171751 | Method and system for fabricating floating guard rings in GaN materials | Andrew P. Edwards, Hui Nie, Richard J. Brown, Isik C. Kizilyalli, David P. Bour +2 more | 2015-10-27 |