Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12284925 | Memory device having a switching element thicker at a first side than at a second side and method of forming the same | Ju Dy LIM, Mei Zhen Ng, Kazutaka Yamane | 2025-04-22 |
| 12224089 | Thin film resistor | Chuan-Hua Wang, Yudi Setiawan | 2025-02-11 |
| 11751483 | Spin diode devices | Wai Cheung Law, Grayson Dao Hwee WONG, Kazutaka Yamane, Wen Siang Lew | 2023-09-05 |
| 11164858 | Integrated circuits and methods of forming integrated circuits | Benfu Lin, Bo Yu, Kin Wai Tang | 2021-11-02 |
| 10840297 | Storage layer for magnetic memory with high thermal stability | Taiebeh Tahmasebi, Vinayak Bharat Naik, Chenchen Jacob Wang | 2020-11-17 |
| 10707358 | Selective shielding of ambient light at chip level | Wanbing Yi, Juan Boon Tan, Kiok Boone Elgin Quek, Khee Yong Lim, Rajesh S. Nair | 2020-07-07 |
| 10483121 | Embedded memory in back-end-of-line low-k dielectric | Lei Wang, Kai Hung Alex See | 2019-11-19 |
| 10475495 | Integrated circuits with magnetic tunnel junctions and methods of producing the same | Wai Cheung Law, Taiebeh Tahmasebi, Kai Hung Alex See, Gerard Joseph Lim, Wen Siang Lew | 2019-11-12 |
| 10468171 | Integrated circuits with magnetic tunnel junctions and methods of producing the same | Wai Cheung Law, Taiebeh Tahmasebi, Dimitri Houssameddine, Michael Nicolas Albert Tran, Kai Hung Alex See +1 more | 2019-11-05 |
| 10297745 | Composite spacer layer for magnetoresistive memory | Taiebeh Tahmasebi, Vinayak Bharat Naik, Kangho Lee, Kazutaka Yamane | 2019-05-21 |
| 10128309 | Storage layer for magnetic memory with high thermal stability | Taiebeh Tahmasebi, Vinayak Bharat Naik, Chenchen Jacob Wang | 2018-11-13 |
| 10008387 | Embedded memory in back-end-of-line low-k dielectric | Lei Wang, Kai Hung Alex See | 2018-06-26 |
| 9997562 | Mram memory device and manufacturing method thereof | Lei Wang, Benfu Lin, Kai Hung Alex See | 2018-06-12 |
| 9972774 | Magnetic memory with high thermal budget | Taiebeh Tahmasebi | 2018-05-15 |
| 9859236 | Integrated circuits having copper bonding structures with silicon carbon nitride passivation layers thereon and methods for fabricating same | Meng Meng Chong, Xuesong Rao, Xiaohua Zhan | 2018-01-02 |
| 9842989 | Magnetic memory with high thermal budget | Taiebeh Tahmasebi, Kah Wee Gan | 2017-12-12 |
| 9548371 | Integrated circuits having nickel silicide contacts and methods for fabricating the same | Jingyan Huang, Chuan-Hua Wang, Yun Ling Tan, Alex See | 2017-01-17 |
| 9293388 | Reliable passivation layers for semiconductor devices | Xuesong Rao, Meng Meng Chong, Hendro Mario, Aison John George, Chor Shu CHENG | 2016-03-22 |
| 9023725 | Filament free silicide formation | Kwee Liang Yeo, Zheng Zou, Alex See | 2015-05-05 |
| 8828858 | Spacer profile engineering using films with continuously increased etch rate from inner to outer surface | Xuesong Rao, Hai Cong, Zheng Zou, Alex See, Yun Ling Tan +2 more | 2014-09-09 |
| 8492236 | Step-like spacer profile | Xuesong Rao, Hai Cong, Zheng Zou, Alex See, Yun Ling Tan +3 more | 2013-07-23 |
| 8354347 | Method of forming high-k dielectric stop layer for contact hole opening | Jianhui Ye, Huang Liu, Alex See, Wei Lu, Chun Hui Low +2 more | 2013-01-15 |
| 8102054 | Reliable interconnects | Bei Chao Zhang, Juan Boon Tan, Fan Zhang, Yong Chiang EE, Bo Tao +2 more | 2012-01-24 |
| 7803704 | Reliable interconnects | Bei Chao Zhang, Juan Boon Tan, Fan Zhang, Yong Chiang EE, Bo Tao +2 more | 2010-09-28 |
| 7790617 | Formation of metal silicide layer over copper interconnect for reliability enhancement | Yeow Kheng Lim, Wei Lu, Liang-Choo Hsia, Jyoti Gupta, Hao Zhang | 2010-09-07 |