Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8354347 | Method of forming high-k dielectric stop layer for contact hole opening | Jianhui Ye, Huang Liu, Alex See, Wei Lu, Chim Seng Seet +2 more | 2013-01-15 |
| 8293545 | Critical dimension for trench and vias | Hai Cong, Yan Shan Li, Yelehanka Ramachandramurthy Pradeep, Liang-Choo Hsia | 2012-10-23 |
| 7781895 | Via electromigration improvement by changing the via bottom geometric profile | Bei Chao Zhang, Hong Lim Lee, Sang Yee Loong, Qiang Guo | 2010-08-24 |
| 7691739 | Via electromigration improvement by changing the via bottom geometric profile | Bei Chao Zhang, Hong Lim Lee, Sang Yee Loong, Qiang Guo | 2010-04-06 |
| 7352064 | Multiple layer resist scheme implementing etch recipe particular to each layer | Nicholas C. M. Fuller, Timothy J. Dalton, Raymond Joy, Yi-Hsiung Lin | 2008-04-01 |
| 7045455 | Via electromigration improvement by changing the via bottom geometric profile | Beichao Zhang, Hong Lim Lee, Sang Yee Loong, Qiang Guo | 2006-05-16 |
| 6350661 | Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts | Chong Wee Lim, Eng Hua Lim, Soh Yun Siah, Kong Hean Lee | 2002-02-26 |
| 6297126 | Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts | Chong Wee Lim, Eng Hua Lim, Soh Yun Siah, Kong Hean Lee | 2001-10-02 |
| 6271133 | Optimized Co/Ti-salicide scheme for shallow junction deep sub-micron device fabrication | Chong Wee Lim, Eng Hua Lim, Kin Leong Pey, Soh Yun Siah | 2001-08-07 |
| 6265302 | Partially recessed shallow trench isolation method for fabricating borderless contacts | Chong Wee Lim, Eng Hua Lim, Soh Yun Siah, Kong Hean Lee | 2001-07-24 |
| 6228727 | Method to form shallow trench isolations with rounded corners and reduced trench oxide recess | Chong Wee Lim, Soh Yun Siah, Eng Hua Lim, Kong Hean Lee | 2001-05-08 |