Issued Patents All Time
Showing 1–25 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9633882 | Integrated circuits with alignment marks and methods of producing the same | Ying Yu, Jianbo Sun, Derui Yin, Rakesh Kumar | 2017-04-25 |
| 8293545 | Critical dimension for trench and vias | Hai Cong, Yan Shan Li, Chun Hui Low, Liang-Choo Hsia | 2012-10-23 |
| 7382027 | MOSFET device with low gate contact resistance | Purakh Raj Verma, Sanford Chu, Lap Chan, Kai Shao, Jia Zhen Zheng | 2008-06-03 |
| 6861317 | Method of making direct contact on gate by using dielectric stop layer | Purakh Raj Verma, Sanford Chu, Lap Chan, Kai Shao, Jia Zhen Zheng | 2005-03-01 |
| 6852605 | Method of forming an inductor with continuous metal deposition | Chit Hwei Ng, Lap Chan, Purakh Raj Verma, Sanford Chu | 2005-02-08 |
| 6821904 | Method of blocking nitrogen from thick gate oxide during dual gate CMP | Sanford Chu, Chit Hwei Ng, Jia Zhen Zheng, Purakh Raj Verma | 2004-11-23 |
| 6791083 | Image compensation device for a scanning electron microscope | Kevin Peng, Chua Thow Phock | 2004-09-14 |
| 6726545 | Linear polishing for improving substrate uniformity | Subramanian Balakumar, Chen Feng, Victor Lim, Paul Proctor, Mukhopadhyay Madhusudan +1 more | 2004-04-27 |
| 6716693 | Method of forming a surface coating layer within an opening within a body by atomic layer deposition | Lap Chan, Sanford Chu, Chit Hwei Ng, Jia Zhen Zheng | 2004-04-06 |
| 6709934 | Method for forming variable-K gate dielectric | James Yong Meng Lee, Ying-Keung Leung, Jia Zhen Zheng, Lap Chan, Elgin Quek +2 more | 2004-03-23 |
| 6660642 | Toxic residual gas removal by non-reactive ion sputtering | Zou Zheng, Zhou Mei Sheng, Paul Proctor | 2003-12-09 |
| 6632745 | Method of forming almost L-shaped spacer for improved ILD gap fill | Chiew Wah Yap, Zheng Zou, Eng Hua Lim, Nguyen Lac, Manni Lal | 2003-10-14 |
| 6566208 | Method to form elevated source/drain using poly spacer | Yang Pan, Lee Yong Meng, Leung Keung, Jia Zhen Zheng, Lap Chan +2 more | 2003-05-20 |
| 6544824 | Method to form a vertical transistor by first forming a gate/spacer stack, then using selective epitaxy to form source, drain and channel | Jia Zhen Zheng, Lap Chan, Elgin Quek, Ravi Sundaresan, Yang Pan +2 more | 2003-04-08 |
| 6541327 | Method to form self-aligned source/drain CMOS device on insulated staircase oxide | Lap Chan, Elgin Quek, Ravi Sundaresan, Yang Pan, James Yong Meng Lee +2 more | 2003-04-01 |
| 6511884 | Method to form and/or isolate vertical transistors | Elgin Quek, Ravi Sundaresan, Yang Pan, Yong Meng Lee, Ying-Keung Leung +2 more | 2003-01-28 |
| 6468853 | Method of fabricating a shallow trench isolation structure with reduced local oxide recess near corner | Palanivel Balasubramanian, Chivkula Subrahmanyam, Narayanan Balasubramanian | 2002-10-22 |
| 6468877 | Method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner | Jia Zhen Zheng, Lap Chan, Elgin Quek, Ravi Sundaresan, Yang Pan +2 more | 2002-10-22 |
| 6461887 | Method to form an inverted staircase STI structure by etch-deposition-etch and selective epitaxial growth | Jia Zhen Zheng, Lap Chan, Elgin Quek, Ravi Sundaresan, Yang Pan +2 more | 2002-10-08 |
| 6461900 | Method to form a self-aligned CMOS inverter using vertical device integration | Ravi Sundaresan, Yang Pan, James Lee Yong Meng, Ying-Keung Leung, Jia Zhen Zheng +2 more | 2002-10-08 |
| 6455377 | Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) | Jia Zhen Zheng, Lap Chan, Elgin Quek, Ravi Sundaresan, Yang Pan +2 more | 2002-09-24 |
| 6451704 | Method for forming PLDD structure with minimized lateral dopant diffusion | Subrahmanyam Chivukula, Jie Ye, Madhudsudan Mukhopdhyay | 2002-09-17 |
| 6440800 | Method to form a vertical transistor by selective epitaxial growth and delta doped silicon layers | James Yong Meng Lee, Ying-Keung Leung, Jia Zhen Zheng, Lap Chan, Elgin Quek +2 more | 2002-08-27 |
| 6436774 | Method for forming variable-K gate dielectric | James Yong Meng Lee, Ying-Keung Leung, Jia Zhen Zheng, Lap Chan, Elgin Quek +2 more | 2002-08-20 |
| 6436770 | Method to control the channel length of a vertical transistor by first forming channel using selective epi and source/drain using implantation | Ying-Keung Leung, Jia Zhen Zheng, Lap Chan, Elgin Quek, Ravi Sundaresan +2 more | 2002-08-20 |