Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8236595 | Nanowire sensor, nanowire sensor array and method of fabricating the same | Ajay Agarwal, Navab Singh, Rakesh Kumar, Ieng Kin Lao | 2012-08-07 |
| 7682914 | Fully salicided (FUCA) MOSFET structure | Patrick Guo-Qiang Lo, Wei-Yip Loh, Ranganathan Nagarajan | 2010-03-23 |
| 7439165 | Method of fabricating tensile strained layers and compressive strain layers for a CMOS device | Patrick Guo-Qiang Lo, Lakshmi Kanta Bera, Wei-Yip Loh, Balakumar Subramanian | 2008-10-21 |
| 7425751 | Method to reduce junction leakage current in strained silicon on silicon-germanium devices | Richard Hammond | 2008-09-16 |
| 7397090 | Gate electrode architecture for improved work function tuning and method of manufacture | Shajan Mathew, Lakshmi Kanta Bera | 2008-07-08 |
| 7316950 | Method of fabricating a CMOS device with dual metal gate electrodes | Chang Seo Park, Byung Jin Cho | 2008-01-08 |
| 7294890 | Fully salicided (FUSA) MOSFET structure | Patrick Guo-Qiang Lo, Wei-Yip Loh, Ranganathan Nagarajan | 2007-11-13 |
| 6846720 | Method to reduce junction leakage current in strained silicon on silicon-germanium devices | Richard Hammond | 2005-01-25 |
| 6664596 | Stacked LDD high frequency LDMOSFET | Jun Cai, Pang Dow Foo | 2003-12-16 |
| 6551937 | Process for device using partial SOI | Cai Jun, Ren Chang Hong, Ranganathan Nagarajan, Yung Chii Liang | 2003-04-22 |
| 6489203 | Stacked LDD high frequency LDMOSFET | Jun Cai, Pang Dow Foo | 2002-12-03 |
| 6468853 | Method of fabricating a shallow trench isolation structure with reduced local oxide recess near corner | Palanivel Balasubramanian, Yelehanka Ramachandramurthy Pradeep, Chivkula Subrahmanyam | 2002-10-22 |
| 6235591 | Method to form gate oxides of different thicknesses on a silicon substrate | Yelehanka Ramachandamurthy Pradeep, Jia Zhen Zheng, Alan Cuthbertson | 2001-05-22 |
| 6200887 | Method to form a smooth gate polysilicon sidewall in the fabrication of integrated circuits | Palanivel Balasubramaniam, Yelehanka Ramachandramurthy Pradeep, Arjun Kumar Kantimahanti | 2001-03-13 |
| 5767004 | Method for forming a low impurity diffusion polysilicon layer | Ching Win Kong, Chuck Jang | 1998-06-16 |