Issued Patents All Time
Showing 1–25 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11164881 | Transistor device, memory arrays, and methods of forming the same | Xinshu Cai, Shyue Seng Tan | 2021-11-02 |
| 11119917 | Neuromorphic memories with split gate flash multi-level cell and method of making the same | Shyue Seng Tan, Xinshu Cai, Fan Zhang, Soh Yun Siah, Tze Ho Simon Chan | 2021-09-14 |
| 11094696 | Methods of forming a thyristor-based random access memory using fin structures and elevated layers | Eng Huat Toh, Shyue Seng Tan, Elgin Quek | 2021-08-17 |
| 11018093 | Magnetic shielding of STT-MRAM in multichip packaging and method of manufacturing the same | Bharat Bhushan, Juan Boon Tan, Boo Yang Jung, Wanbing Yi | 2021-05-25 |
| 10978510 | Memory device with density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology | Pinghui Li, Haiqing Zhou, Liying Zhang, Wanbing Yi, Ming Zhu +1 more | 2021-04-13 |
| 10741552 | Method and device for embedding flash memory and logic integration in FinFET technology | Ming Zhu, Pinghui Li, Su Yi Susan Yeow, Yiang Aun Nga, Eng Huat Toh | 2020-08-11 |
| 10693054 | MTJ bottom metal via in a memory cell and method for producing the same | Wanbing Yi, Curtis Chun-I Hsieh, Yi Jiang, Juan Boon Tan, Benfu Lin | 2020-06-23 |
| 10685970 | Low cost multiple-time programmable cell on silicon on insulator technology and method for producing the same | Eng Huat Toh, Shyue Seng Tan | 2020-06-16 |
| 10636867 | Metal-insulator-poly capacitor in a high-K metal gate process and method of manufacturing | Xinshu Cai, Shyue Seng Tan, Juan Boon Tan | 2020-04-28 |
| 10608046 | Integrated two-terminal device with logic device for embedded application | Wanbing Yi, Curtis Chun-I Hsieh, Juan Boon Tan, Soh Yun Siah, Hai Cong +3 more | 2020-03-31 |
| 10515679 | Magneto-resistive memory structures with improved sensing, and associated sensing methods | Akhilesh Jaiswal, Ajey Poovannummoottil Jacob, Bipul C. Paul, William J. Taylor, Jr. | 2019-12-24 |
| 10510392 | Integrated circuits having memory cells with shared bit lines and shared source lines | Bipul C. Paul, Akhilesh Jaiswal, Ajey Poovannummoottil Jacob, William J. Taylor, Jr. | 2019-12-17 |
| 10510946 | MRAM chip magnetic shielding | Bharat Bhushan, Juan Boon Tan, Wanbing Yi, Shan Gao, Kangho Lee | 2019-12-17 |
| 10461247 | Integrated magnetic random access memory with logic device having low-K interconnects | Juan Boon Tan, Yi Jiang, Wanbing Yi, Francis Poh, Hai Cong | 2019-10-29 |
| 10446607 | Integrated two-terminal device with logic device for embedded application | Wanbing Yi, Curtis Chun-I Hsieh, Juan Boon Tan, Soh Yun Siah, Hai Cong +3 more | 2019-10-15 |
| 10431732 | Shielded magnetoresistive random access memory devices and methods for fabricating the same | Bhushan Bharat, Shan Gao, Wanbing Yi, Juan Boon Tan, Wei Yi Lim +3 more | 2019-10-01 |
| 10411027 | Integrated circuits with memory cells and method for producing the same | Ming Zhu, Pinghui Li, Eng Huat Toh, Yiang Aun Nga | 2019-09-10 |
| 10381404 | Integrated circuits with memory cells and methods for producing the same | Bhushan Bharat, Juan Boon Tan, Yi Jiang, Wanbing Yi | 2019-08-13 |
| 10374005 | Density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology and method for producing the same | Pinghui Li, Haiqing Zhou, Liying Zhang, Wanbing Yi, Ming Zhu +1 more | 2019-08-06 |
| 10361162 | Magnetic shielding of STT-MRAM in multichip packaging and method of manufacturing the same | Bharat Bhushan, Juan Boon Tan, Boo Yang Jung, Wanbing Yi | 2019-07-23 |
| 10347826 | STT-MRAM flip-chip magnetic shielding and method for producing the same | Bharat Bhushan, Juan Boon Tan, Wanbing Yi | 2019-07-09 |
| 10332597 | Floating gate OTP/MTP structure and method for producing the same | Shyue Seng Tan, Eng Huat Toh | 2019-06-25 |
| 10312442 | Non-volatile memory devices, RRAM devices and methods for fabricating RRAM devices with magnesium oxide insulator layers | Desmond Jia Jun Loy, Wen Siang Lew | 2019-06-04 |
| 10290679 | High-Density STT-MRAM with 3D arrays of MTJs in multiple levels of interconnects and method for producing the same | Bharat Bhushan, Juan Boon Tan, Yi Jiang, Wanbing Yi | 2019-05-14 |
| 10163901 | Method and device for embedding flash memory and logic integration in FinFET technology | Ming Zhu, Pinghui Li, Su Yi Susan Yeow, Yiang Aun Nga, Eng Huat Toh | 2018-12-25 |