TS

Theodorus E. Standaert

IBM: 284 patents #82 of 70,183Top 1%
Globalfoundries: 18 patents #182 of 4,424Top 5%
TE Tessera: 10 patents #41 of 271Top 20%
Samsung: 1 patents #49,284 of 75,807Top 70%
AM AMD: 1 patents #5,683 of 9,279Top 65%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
RE Renesas Electronics: 1 patents #2,739 of 4,529Top 65%
📍 Clifton Park, NY: #2 of 1,126 inventorsTop 1%
🗺 New York: #54 of 115,490 inventorsTop 1%
Overall (All Time): #1,202 of 4,157,543Top 1%
309
Patents All Time

Issued Patents All Time

Showing 101–125 of 309 patents

Patent #TitleCo-InventorsDate
10297689 Precise control of vertical transistor gate length Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-05-21
10297448 SiGe fins formed on a substrate Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-05-21
10290633 CMOS compatible fuse or resistor using self-aligned contacts Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-05-14
10283586 Capacitors Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Junli Wang 2019-05-07
10283406 Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-05-07
10276658 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-04-30
10276436 Selective recessing to form a fully aligned via Benjamin D. Briggs, Jessica Dechene, Elbert E. Huang, Joe Lee 2019-04-30
10269806 Semiconductor structures with deep trench capacitor and methods of manufacture Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung +1 more 2019-04-23
10269644 Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-04-23
10249537 Method and structure for forming FinFET CMOS with dual doped STI regions Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-04-02
10249536 Semiconductor fins for FinFET devices and sidewall image transfer (SIT) processes for manufacturing the same Veeraraghavan S. Basker, Kangguo Cheng 2019-04-02
10243020 Structures and methods for embedded magnetic random access memory (MRAM) fabrication Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Michael Rizzolo 2019-03-26
10242872 Rework of patterned dielectric and metal hardmask films John C. Arnold, Prasad Bhosale, Donald F. Canaperi, Raghuveer R. Patlolla, Cornelius Brown Peethala +1 more 2019-03-26
10236380 Precise control of vertical transistor gate length Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-03-19
10236359 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-03-19
10236293 FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-03-19
10236289 Approach to fabrication of an on-chip resistor with a field effect transistor Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-03-19
10229905 Electrostatic discharge devices and methods of manufacture Huiming Bu, Junjun Li, Tenko Yamashita 2019-03-12
10224247 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-03-05
10217840 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-02-26
10211155 Reducing metallic interconnect resistivity through application of mechanical strain Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Michael Rizzolo 2019-02-19
10177256 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2019-01-08
10170540 Capacitors Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Junli Wang 2019-01-01
10157908 Electrostatic discharge devices and methods of manufacture Huiming Bu, Junjun Li, Tenko Yamashita 2018-12-18
10157912 CMOS compatible fuse or resistor using self-aligned contacts Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-12-18