TS

Theodorus E. Standaert

IBM: 284 patents #82 of 70,183Top 1%
Globalfoundries: 18 patents #182 of 4,424Top 5%
TE Tessera: 10 patents #41 of 271Top 20%
Samsung: 1 patents #49,284 of 75,807Top 70%
AM AMD: 1 patents #5,683 of 9,279Top 65%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
RE Renesas Electronics: 1 patents #2,739 of 4,529Top 65%
📍 Clifton Park, NY: #2 of 1,126 inventorsTop 1%
🗺 New York: #54 of 115,490 inventorsTop 1%
Overall (All Time): #1,202 of 4,157,543Top 1%
309
Patents All Time

Issued Patents All Time

Showing 151–175 of 309 patents

Patent #TitleCo-InventorsDate
9954107 Strained FinFET source drain isolation Kangguo Cheng, Veeraraghavan S. Basker, Junli Wang 2018-04-24
9953865 Structure and method to improve FAV RIE process margin and electromigration Benjamin D. Briggs, Joe Lee 2018-04-24
9947663 FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-04-17
9941211 Reducing metallic interconnect resistivity through application of mechanical strain Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Michael Rizzolo 2018-04-10
9941392 Gate planarity for FinFET using dummy polish stop Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-04-10
9941378 Air-gap top spacer and self-aligned metal gate for vertical FETs Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-04-10
9917137 Integrated magnetic tunnel junction (MTJ) in back end of line (BEOL) interconnects Benjamin D. Briggs, Michael Rizzolo 2018-03-13
9917082 Approach to fabrication of an on-chip resistor with a field effect transistor Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-03-13
9905469 Method and structure for forming FinFET CMOS with dual doped STI regions Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-02-27
9893145 On chip MIM capacitor Kangguo Cheng 2018-02-13
9881926 Static random access memory (SRAM) density scaling by using middle of line (MOL) flow Veeraraghavan S. Basker, Kangguo Cheng, Sivananda K. Kanakasabapathy, Junli Wang 2018-01-30
9876009 CMOS compatible fuse or resistor using self-aligned contacts Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-01-23
9871116 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-01-16
9865739 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2018-01-09
9853022 MIM capacitor formation in RMG module Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-12-26
9812567 Precise control of vertical transistor gate length Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-11-07
9805987 Self-aligned punch through stopper liner for bulk FinFET Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-10-31
9793175 FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-10-17
9786563 Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-10-10
9780091 Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-10-03
9780035 Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects Benjamin D. Briggs, James J. Kelly, Koichi Motoyama, Roger A. Quon, Michael Rizzolo 2017-10-03
9761500 FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-09-12
9761496 Field effect transistor contacts Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-09-12
9735246 Air-gap top spacer and self-aligned metal gate for vertical fets Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-08-15
9721893 Self-forming barrier for subtractive copper Vamsi K. Paruchuri 2017-08-01