Issued Patents All Time
Showing 226–250 of 360 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10319638 | Self-aligned contact cap | Kangguo Cheng | 2019-06-11 |
| 10312325 | Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations | Kangguo Cheng | 2019-06-04 |
| 10312132 | Forming sacrificial endpoint layer for deep STI recess | Kangguo Cheng, Juntao Li, Sebastian Naczas | 2019-06-04 |
| 10312148 | Method and structure for forming MOSFET with reduced parasitic capacitance | Kangguo Cheng, Chen Zhang | 2019-06-04 |
| 10312245 | Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared pFET and nFET trench | Zuoguang Liu, Gen Tsutsui, Heng Wu | 2019-06-04 |
| 10312370 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy | 2019-06-04 |
| 10304742 | Forming insulator fin structure in isolation region to support gate structures | Kangguo Cheng | 2019-05-28 |
| 10297667 | Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor | Chun Wing Yeung, Chen Zhang, Huiming Bu, Kangguo Cheng | 2019-05-21 |
| 10290383 | Deposition of integrated protective material into zirconium cladding for nuclear reactors by high-velocity thermal application | Jason P. Mazzoccoli, Edward J. Lahoda | 2019-05-14 |
| 10283592 | Approach to minimization of strain loss in strained fin field effect transistors | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-05-07 |
| 10283565 | Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2019-05-07 |
| 10283606 | Vertical fin with a gate structure having a modified gate geometry | Kangguo Cheng | 2019-05-07 |
| 10269957 | Reduced resistance source and drain extensions in vertical field effect transistors | Chun Wing Yeung, Chen Zhang | 2019-04-23 |
| 10263075 | Nanosheet CMOS transistors | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-04-16 |
| 10262861 | Forming a fin cut in a hardmask | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-04-16 |
| 10262890 | Method of forming silicon hardmask | Kangguo Cheng | 2019-04-16 |
| 10263100 | Buffer regions for blocking unwanted diffusion in nanosheet transistors | Zhenxing Bi, Kangguo Cheng, Juntao Li | 2019-04-16 |
| 10256154 | Uniform shallow trench isolation | Kangguo Cheng, Junli Wang, Chen Zhang | 2019-04-09 |
| 10249755 | Transistor with asymmetric source/drain overlap | Kangguo Cheng, Heng Wu, Zhenxing Bi | 2019-04-02 |
| 10249731 | Vertical FET with sharp junctions | Juntao Li, Kangguo Cheng, Heng Wu | 2019-04-02 |
| 10249541 | Forming a hybrid channel nanosheet semiconductor structure | Kangguo Cheng | 2019-04-02 |
| 10243061 | Nanosheet transistor | Kangguo Cheng, Juntao Li, Heng Wu | 2019-03-26 |
| 10242983 | Semiconductor device with increased source/drain area | Kangguo Cheng, Chi-Chun Liu, Jie Yang | 2019-03-26 |
| 10242881 | Self-aligned single dummy fin cut with tight pitch | Kangguo Cheng, Cheng Chi, Chi-Chun Liu | 2019-03-26 |
| 10236364 | Tunnel transistor | Kangguo Cheng, Heng Wu, Zhenxing Bi | 2019-03-19 |