Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11170151 | Checking wafer-level integrated designs for rule compliance | Terence B. Hook | 2021-11-09 |
| 10691870 | Checking wafer-level integrated designs for rule compliance | Terence B. Hook | 2020-06-23 |
| 10346580 | Checking wafer-level integrated designs for rule compliance | Terence B. Hook | 2019-07-09 |
| 10248755 | Checking wafer-level integrated designs for antenna rule compliance | Terence B. Hook | 2019-04-02 |
| 9990459 | Checking wafer-level integrated designs for antenna rule compliance | Terence B. Hook | 2018-06-05 |
| 9646125 | Method for conversion of commercial microprocessor to radiation-hardened processor and resulting processor | John A. Fifield, Mark C. Hakey, Jason D. Hibbeler, James S. Nakos, Tak H. Ning +3 more | 2017-05-09 |
| 8619979 | Physically unclonable function implemented through threshold voltage comparison | Joel T. Ficke, William E. Hall, Terence B. Hook, Michael A. Sperling | 2013-12-31 |
| 7930663 | Structure for integrated circuit for measuring set-up and hold times for a latch element | — | 2011-04-19 |
| 7826285 | Memory column redundancy scheme | — | 2010-11-02 |
| 7793239 | Method and system of modeling leakage | James Engel, Susan K. Lichtensteiger, Paul J. Sulva | 2010-09-07 |
| 7773437 | Design structure for improved memory column redundancy scheme | — | 2010-08-10 |
| 7345943 | Unclocked eFUSE circuit | — | 2008-03-18 |
| 7315193 | Circuitry and method for programming an electrically programmable fuse | Darren L. Anand | 2008-01-01 |
| 7098721 | Low voltage programmable eFuse with differential sensing scheme | Michael R. Ouellette | 2006-08-29 |
| 7000155 | Redundancy register architecture for soft-error tolerance and methods of making the same | Jeffery H. Oppold, Michael R. Ouellette | 2006-02-14 |
| 6624677 | Radiation tolerant flip-flop | — | 2003-09-23 |
| 6609228 | Latch clustering for power optimization | Paul H. Bergeron, Keith M. Carrig, Alvar A. Dean, Roger P. Gregor, David J. Hathaway +2 more | 2003-08-19 |
| 6490708 | Method of integrated circuit design by selection of noise tolerant gates | John M. Cohn, Scott Whitney Gould, Peter A. Habitz, Jose L. Neves, William F. Smith +1 more | 2002-12-03 |
| 6426641 | Single pin performance screen ring oscillator with frequency division | Steven Paul Koch, Donald L. Wheater | 2002-07-30 |
| 5389836 | Branch isolation circuit for cascode voltage switch logic | Allan Robert Bertolet, Albert M. Chu, William R. Griffin, John G. Petrovick, Jr. | 1995-02-14 |
| 5118972 | BiCMOS gate pull-down circuit | Terrance John Zittritsch | 1992-06-02 |