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2001-03-20 |
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Glitch free delay line multiplexing technique |
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2000-02-15 |
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Method and system for layout and schematic generation for heterogeneous arrays |
Kim P. N. Clinton, Scott Whitney Gould, Frank Ray Keyser III, Timothy Shawn Reny, Terrance John Zittritsch |
1999-06-08 |
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Consolidated chip design for wire bond and flip-chip package technologies |
James Fiore, Eberhard Gramatski |
1998-12-01 |
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Programmable inverter circuit used in a programmable logic cell |
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1998-07-14 |
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Programmable logic cell |
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1998-05-05 |
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Method and system for layout and schematic generation for heterogeneous arrays |
Kim P. N. Clinton, Scott Whitney Gould, Frank Ray Keyser, III, Timothy Shawn Reny, Terrance John Zittritsch |
1998-03-31 |
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Programmable array I/O-routing resource |
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Programmable logic cell having configurable gates and multiplexers |
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1997-07-08 |
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Branch isolation circuit for cascode voltage switch logic |
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