| 6038192 |
Memory cells for field programmable memory array |
Joseph A. Iadanza, Frank Ray Keyser, III, Victor Paul Seidel, Terrance John Zittritsch |
2000-03-14 |
| 6023421 |
Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array |
Scott Whitney Gould, Joseph A. Iadanza, Frank Ray Keyser, III, Ralph David Kilmoyer, Michael Joseph Laramie +2 more |
2000-02-08 |
| 5949719 |
Field programmable memory array |
Scott Whitney Gould, Joseph A. Iadanza, Frank Ray Keyser, III, Ralph David Kilmoyer, Michael Joseph Laramie +2 more |
1999-09-07 |
| 5910733 |
Method and system for layout and schematic generation for heterogeneous arrays |
Allan Robert Bertolet, Scott Whitney Gould, Frank Ray Keyser III, Timothy Shawn Reny, Terrance John Zittritsch |
1999-06-08 |
| 5836007 |
Methods and systems for improving memory component size and access speed including splitting bit lines and alternate pre-charge/access cycles |
Frank Ray Keyser III, Wendell Ray Larsen |
1998-11-10 |
| 5781032 |
Programmable inverter circuit used in a programmable logic cell |
Allan Robert Bertolet, Christine Marie Fuller, Scott Whitney Gould, Steven Paul Hartman, Joseph A. Iadanza +6 more |
1998-07-14 |
| 5748009 |
Programmable logic cell |
Allan Robert Bertolet, Christine Marie Fuller, Scott Whitney Gould, Steven Paul Hartman, Joseph A. Iadanza +6 more |
1998-05-05 |
| 5734582 |
Method and system for layout and schematic generation for heterogeneous arrays |
Allan Robert Bertolet, Scott Whitney Gould, Frank Ray Keyser, III, Timothy Shawn Reny, Terrance John Zittritsch |
1998-03-31 |
| 5646546 |
Programmable logic cell having configurable gates and multiplexers |
Allan Robert Bertolet, Christine Marie Fuller, Scott Whitney Gould, Steven Paul Hartman, Joseph A. Iadanza +6 more |
1997-07-08 |
| 5631578 |
Programmable array interconnect network |
Scott Whitney Gould, Steven Paul Hartman, Joseph A. Iadanza, Frank Ray Keyser, III, Eric Ernest Millham |
1997-05-20 |
