Issued Patents All Time
Showing 26–50 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9093503 | Semiconductor chip with a dual damascene wire and through-substrate via (TSV) structure | Mukta G. Farooq, Jeffrey P. Gambino, Zhong-Xiang He, Kevin S. Petrarca, Anthony K. Stamper | 2015-07-28 |
| 9059052 | Alternating open-ended via chains for testing via formation and dielectric integrity | Cathryn J. Christiansen, Roger A. Dufresne | 2015-06-16 |
| 9029172 | On-chip poly-to-contact process monitoring and reliability evaluation system and method of use | Roger A. Dufresne, Timothy D. Sullivan, Yanfeng Wang | 2015-05-12 |
| 9013202 | Testing structure and method of using the testing structure | Kai D. Feng, Pui L. Yee | 2015-04-21 |
| 8945955 | Method of changing reflectance or resistance of a region in an optoelectronic memory device | Richard S. Kontra, Tom C. Lee, Theodore M. Levin, Christopher D. Muzzy, Timothy D. Sullivan | 2015-02-03 |
| 8917104 | Analyzing EM performance during IC manufacturing | Roger A. Dufresne, Kai D. Feng, Richard St-Pierre | 2014-12-23 |
| 8890556 | Real-time on-chip EM performance monitoring | Roger A. Dufresne, Kai D. Feng, Richard St-Pierre | 2014-11-18 |
| 8847401 | Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure | Jeffrey P. Gambino, Zhong-Xiang He, Xin Wang, Yanfeng Wang | 2014-09-30 |
| 8779491 | 3D via capacitor with a floating conductive plate for improved reliability | Chih-Chao Yang, Baozhen Li | 2014-07-15 |
| 8754655 | Test structure, method and circuit for simultaneously testing time dependent dielectric breakdown and electromigration or stress migration | David G. Brochu, JR., Roger A. Dufresne, Travis S. Merrill, Michael A. Shinosky | 2014-06-17 |
| 8749293 | Stackable programmable passive device and a testing method | Douglas D. Coolbaugh, Baozhen Li | 2014-06-10 |
| 8609504 | 3D via capacitor with a floating conductive plate for improved reliability | Chih-Chao Yang, Baozhen Li | 2013-12-17 |
| 8569888 | Wiring structure and method of forming the structure | Jeffrey P. Gambino, Anthony K. Stamper, Timothy D. Sullivan | 2013-10-29 |
| 8563336 | Method for forming thin film resistor and terminal bond pad simultaneously | Jeffrey P. Gambino, Zhong-Xiang He, Tom C. Lee, John C. Malinowski, Anthony K. Stamper | 2013-10-22 |
| 8525153 | Structure including voltage controlled negative resistance | Elbert E. Huang, Michael A. Shinosky | 2013-09-03 |
| 8497203 | Semiconductor structures and methods of manufacture | Zhong-Xiang He, Anthony K. Stamper | 2013-07-30 |
| 8405135 | 3D via capacitor with a floating conductive plate for improved reliability | Chih-Chao Yang, Baozhen Li | 2013-03-26 |
| 8362794 | Method and system for assessing reliability of integrated circuit | Kai D. Feng, Zhong-Xiang He | 2013-01-29 |
| 8294505 | Stackable programmable passive device and a testing method | Douglas D. Coolbaugh, Baozhen Li | 2012-10-23 |
| 8288747 | Optoelectronic memory devices | Richard S. Kontra, Tom C. Lee, Theodore M. Levin, Christopher D. Muzzy, Timothy D. Sullivan | 2012-10-16 |
| 8237463 | Method for managing circuit reliability | Kai D. Feng, Zhong-Xiang He | 2012-08-07 |
| 8178434 | On-chip embedded thermal antenna for chip cooling | Jeffrey P. Gambino, Alvin W. Strong | 2012-05-15 |
| 8053814 | On-chip embedded thermal antenna for chip cooling | Jeffrey P. Gambino, Alvin W. Strong | 2011-11-08 |
| 8018017 | Thermo-mechanical cleavable structure | Cathryn J. Christiansen, Richard S. Kontra, Tom C. Lee, Alvin W. Strong, Timothy D. Sullivan +1 more | 2011-09-13 |
| 7998828 | Method of forming metal ion transistor | Armin Fischer | 2011-08-16 |