CL

Choonghyun Lee

IBM: 388 patents #42 of 70,183Top 1%
ET Elpis Technologies: 5 patents #4 of 121Top 4%
Samsung: 3 patents #30,683 of 75,807Top 45%
KF Korea University Research And Business Foundation: 2 patents #312 of 2,072Top 20%
SC Semes Co.: 2 patents #274 of 991Top 30%
TE Tessera: 1 patents #207 of 271Top 80%
📍 Rensselaer, NY: #1 of 101 inventorsTop 1%
🗺 New York: #33 of 115,490 inventorsTop 1%
Overall (All Time): #630 of 4,157,543Top 1%
401
Patents All Time

Issued Patents All Time

Showing 151–175 of 401 patents

Patent #TitleCo-InventorsDate
10930758 Space deposition between source/drain and sacrificial layers Shogo Mochizuki, Kangguo Cheng, Juntao Li 2021-02-23
10930567 Maskless epitaxial growth of phosphorus-doped Si and boron-doped SiGe (Ge) for advanced source/drain contact Shogo Mochizuki, Chun Wing Yeung, Hemanth Jagannathan 2021-02-23
10923403 Co-integration of high carrier mobility PFET and NFET devices on the same substrate using low temperature condensation Takashi Ando, Pouya Hashemi 2021-02-16
10916659 Asymmetric threshold voltage FinFET device by partial channel doping variation Alexander Reznicek, Pouya Hashemi, Takashi Ando, Jingyun Zhang 2021-02-09
10916649 Vertical field effect transistor with reduced external resistance Juntao Li, Kangguo Cheng, Peng Xu 2021-02-09
10916638 Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance Kangguo Cheng, Shogo Mochizuki, Juntao Li 2021-02-09
10916633 Silicon germanium FinFET with low gate induced drain leakage current Shogo Mochizuki, Kangguo Cheng, Juntao Li 2021-02-09
10916432 Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device Takashi Ando, Pouya Hashemi, Hemanth Jagannathan, Vijay Narayanan 2021-02-09
10910494 Method and structure for forming vertical transistors with various gate lengths Kangguo Cheng, Shogo Mochizuki, Juntao Li 2021-02-02
10910273 Forming shallow trench isolation regions for nanosheet field-effect transistor devices using sacrificial epitaxial layer Nicolas Loubet, Richard A. Conti 2021-02-02
10903318 External resistance reduction with embedded bottom source/drain for vertical transport FET Reinaldo Vega, Jingyun Zhang, Miaomiao Wang 2021-01-26
10903339 Vertical transport FET devices having a sacrificial doped layer Kangguo Cheng, Juntao Li, Shogo Mochizuki 2021-01-26
10896965 Formation of wrap-around-contact to reduce contact resistivity Adra Carr, Jingyun Zhang, Takashi Ando, Pouya Hashemi 2021-01-19
10896962 Asymmetric threshold voltages in semiconductor devices Takashi Ando, Alexander Reznicek, Jingyun Zhang, Pouya Hashemi 2021-01-19
10892368 Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension regions Kangguo Cheng, Juntao Li, Shogo Mochizuki 2021-01-12
10892339 Gate first technique in vertical transport FET using doped silicon gates with silicide Ruqiang Bao, Hemanth Jagannathan, Paul C. Jamison, Sanjay C. Mehta, Vijay Narayanan 2021-01-12
10892336 Wrap-around-contact structure for top source/drain in vertical FETS Christopher J. Waskiewicz, Alexander Reznicek, Hemanth Jagannathan 2021-01-12
10892325 Vertical field effect transistor with reduced gate to source/drain capacitance Juntao Li, Kangguo Cheng, Peng Xu 2021-01-12
10892324 Vertical field effect transistor with reduced gate to source/drain capacitance Juntao Li, Kangguo Cheng, Peng Xu 2021-01-12
10892195 Method and structure for forming a vertical field-effect transistor using a replacement metal gate process Kangguo Cheng, Kisik Choi 2021-01-12
10886334 Vertical array of resistive switching devices having a tunable oxygen vacancy concentration Takashi Ando 2021-01-05
10886183 Method and structure for forming a vertical field-effect transistor using a replacement metal gate process Kangguo Cheng, Kisik Choi 2021-01-05
10886376 Formation of wrap-around-contact to reduce contact resistivity Adra Carr, Jingyun Zhang, Takashi Ando, Pouya Hashemi 2021-01-05
10886369 Formation of self-limited inner spacer for gate-all-around nanosheet FET Jingyun Zhang, Takashi Ando, Alexander Reznicek, Pouya Hashemi 2021-01-05
10886368 I/O device scheme for gate-all-around transistors Jingyun Zhang, Alexander Reznicek, Xin Miao 2021-01-05