Issued Patents All Time
Showing 126–150 of 184 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7288445 | Double gated transistor and method of fabrication | Meikei Ieong, K. Paul Muller, Edward J. Nowak, David M. Fried, Jed H. Rankin | 2007-10-30 |
| 7285474 | Air-gap insulated interconnections | Brent A. Anderson, Jeffrey P. Gambino, Anthony K. Stamper | 2007-10-23 |
| 7274053 | Fin device with capacitor integrated under gate electrode | Brent A. Anderson, Edward J. Nowak | 2007-09-25 |
| 7259590 | Driver for multi-voltage island/core architecture | Brent A. Anderson, Edward J. Nowak | 2007-08-21 |
| 7227205 | Strained-silicon CMOS device and method | Qiqing C. Ouyang, Kern Rim | 2007-06-05 |
| 7205591 | Pixel sensor cell having reduced pinning layer barrier potential and method thereof | James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Jerome B. Lasky +1 more | 2007-04-17 |
| 7187042 | Backgated FinFET having different oxide thicknesses | Omer H. Dokumaci, Hussein I. Hanafi, Edward J. Nowak | 2007-03-06 |
| 7183573 | Disposable spacer for symmetric and asymmetric Schottky contact to SOI mosfet | Jerome B. Lasky, Effendi Leobandung, Dominic J. Schepis | 2007-02-27 |
| 7132339 | Transistor structure with thick recessed source/drain structures and fabrication process of same | Mark D. Jaffe | 2006-11-07 |
| 7105934 | FinFET with low gate capacitance and low extrinsic resistance | Brent A. Anderson, Edward J. Nowak | 2006-09-12 |
| 7102166 | Hybrid orientation field effect transistors (FETs) | William F. Clark, Jr., Edward J. Nowak | 2006-09-05 |
| 7091128 | Method for avoiding oxide undercut during pre-silicide clean for thin spacer FETs | Atul Ajmera, Percy V. Gilbert, Michael A. Gribelyuk, Edward P. Maciejewski, Renee T. Mo +1 more | 2006-08-15 |
| 7087966 | Double-Gate FETs (field effect transistors) | Brent A. Anderson, Edward J. Nowak | 2006-08-08 |
| 7075153 | Grounded body SOI SRAM cell | Fariborz Assaderaghi, Peter E. Cottrell, Robert J. Gauthier, Jr., Randy W. Mann, Edward J. Nowak +1 more | 2006-07-11 |
| 7056773 | Backgated FinFET having different oxide thicknesses | Omer H. Dokumaci, Hussein I. Hanafi, Edward J. Nowak | 2006-06-06 |
| 7009265 | Low capacitance FET for operation at subthreshold voltages | Brent A. Anderson, William F. Clark, Jr., Edward J. Nowak | 2006-03-07 |
| 6991979 | Method for avoiding oxide undercut during pre-silicide clean for thin spacer FETs | Atul Ajmera, Percy V. Gilbert, Michael A. Gribelyuk, Edward P. Maciejewski, Renee T. Mo +1 more | 2006-01-31 |
| 6960806 | Double gated vertical transistor with different first and second gate materials | Meikei Ieong, K. Paul Muller, Edward J. Nowak, David M. Fried, Jed H. Rankin | 2005-11-01 |
| 6947275 | Fin capacitor | Brent A. Anderson, Edward J. Nowak, Jed H. Rankin | 2005-09-20 |
| 6943405 | Integrated circuit having pairs of parallel complementary FinFETs | William F. Clark, Jr., David M. Fried, Mark D. Jaffe, Edward J. Nowak, John J. Pekarik +1 more | 2005-09-13 |
| 6940130 | Body contact MOSFET | Peter E. Cottrell, John J. Ellis-Monaghan, Robert J. Gauthier, Jr., Edward J. Nowak, Jed H. Rankin +1 more | 2005-09-06 |
| 6913960 | Fin-based double poly dynamic threshold CMOS FET with spacer gate and method of fabrication | K. Paul Muller, Edward J. Nowak | 2005-07-05 |
| 6870225 | Transistor structure with thick recessed source/drain structures and fabrication process of same | Mark D. Jaffe | 2005-03-22 |
| 6867460 | FinFET SRAM cell with chevron FinFET logic | Brent A. Anderson, Edward J. Nowak | 2005-03-15 |
| 6774017 | Method and structures for dual depth oxygen layers in silicon-on-insulator processes | Jeffrey S. Brown, Robert J. Gauthier, Jr., Randy W. Mann, Steven H. Voldman | 2004-08-10 |