Issued Patents All Time
Showing 526–550 of 767 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8513765 | Formation method and structure for a well-controlled metallic source/drain semiconductor device | Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2013-08-20 |
| 8507989 | Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance | Ali Khakifirooz, Kangguo Cheng | 2013-08-13 |
| 8497168 | Structure and method to enhance both NFET and PFET performance using different kinds of stressed layers | Haining Yang, Huilong Zhu | 2013-07-30 |
| 8492839 | Same-chip multicharacteristic semiconductor structures | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Ghavam G. Shahidi | 2013-07-23 |
| 8492854 | Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Christian Lavoie | 2013-07-23 |
| 8486511 | Pattern formation employing self-assembled material | Charles T. Black, Timothy J. Dalton, Carl Radens | 2013-07-16 |
| 8486776 | Strained devices, methods of manufacture and design structures | Stephen W. Bedell, Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Katherine L. Saenger | 2013-07-16 |
| 8487355 | Structure and method for compact long-channel FETs | Carl Radens, Anthony K. Stamper | 2013-07-16 |
| 8486512 | Pattern formation employing self-assembled material | Charles T. Black, Timothy J. Dalton, Carl Radens | 2013-07-16 |
| 8471343 | Parasitic capacitance reduction in MOSFET by airgap ild | Kangguo Cheng, Charles W. Koburger, III | 2013-06-25 |
| 8455932 | Local interconnect structure self-aligned to gate structure | Ali Khakifirooz, Kangguo Cheng, Wilfried E. Haensch, Balasubramanian S. Haran, Pranita Kulkarni | 2013-06-04 |
| 8455308 | Fully-depleted SON | Kangguo Cheng, Pranita Kulkarni, Ghavam G. Shahidi | 2013-06-04 |
| 8450178 | Borderless contacts for semiconductor devices | Kangguo Cheng, Keith Kwong Hon Wong | 2013-05-28 |
| 8450807 | MOSFETs with reduced contact resistance | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni | 2013-05-28 |
| 8445971 | Field effect transistor device with raised active regions | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2013-05-21 |
| 8445345 | CMOS structure having multiple threshold voltage devices | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni | 2013-05-21 |
| 8440552 | Method to form low series resistance transistor devices on silicon on insulator layer | Kangguo Chen, Balasubramanian S. Haran, Amlan Majumdar, Sanjay C. Mehta | 2013-05-14 |
| 8435846 | Semiconductor devices with raised extensions | Kangguo Cheng, Balasubramanian S. Haran, Ali Khakifirooz, Pranita Kulkarni | 2013-05-07 |
| 8421159 | Raised source/drain field effect transistor | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni | 2013-04-16 |
| 8421156 | FET with self-aligned back gate | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni | 2013-04-16 |
| 8420464 | Spacer as hard mask scheme for in-situ doping in CMOS finFETs | Veeraraghavan S. Basker, Kangguo Cheng, Johnathan E. Faltermeier, Sivananda K. Kanakasabapathy, Hemant Adhikari | 2013-04-16 |
| 8404540 | Device and method of reducing junction leakage | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Ghavam G. Shahidi | 2013-03-26 |
| 8399938 | Stressed Fin-FET devices with low contact resistance | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Ghavam G. Shahidi | 2013-03-19 |
| 8394710 | Semiconductor devices fabricated by doped material layer as dopant source | Kangguo Cheng, Balasubramanian S. Haran, Ali Khakifirooz, Ghavam G. Shahidi | 2013-03-12 |
| 8383474 | Thin channel device and fabrication method with a reverse embedded stressor | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni, Ghavam G. Shahidi | 2013-02-26 |