Issued Patents All Time
Showing 51–75 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7611937 | High performance transistors with hybrid crystal orientations | Chung-Te Lin, I-Lu Wu | 2009-11-03 |
| 7575968 | Inverse slope isolation and dual surface orientation integration | Debby Eades, Joe Mogab, Bich-Yen Nguyen, Melissa O. Zavala, Gregory S. Spencer | 2009-08-18 |
| 7575975 | Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer | Voon-Yew Thean, Jian Chen, Bich-Yen Nguyen, Da Zhang | 2009-08-18 |
| 7564074 | Semiconductor device including a lateral field-effect transistor and Schottky diode | Berinder Brar, Wonill Ha, Chanh Nguyen | 2009-07-21 |
| 7560318 | Process for forming an electronic device including semiconductor layers having different stresses | Venkat R. Kolagunta, William J. Taylor, Jr., Victor H. Vartanian | 2009-07-14 |
| 7544548 | Trench liner for DSO integration | Ted R. White, Bich-Yen Nguyen | 2009-06-09 |
| 7524707 | Modified hybrid orientation technology | Olubunmi O. Adetutu, Ted R. White, Bich-Yen Nguyen | 2009-04-28 |
| 7504673 | Semiconductor device including a lateral field-effect transistor and Schottky diode | Berinder Brar, Wonill Ha, Chanh Nguyen | 2009-03-17 |
| 7435639 | Dual surface SOI by lateral epitaxial overgrowth | Brian A. Winstead, Omar Zia, Marius Orlowski | 2008-10-14 |
| 7419866 | Process of forming an electronic device including a semiconductor island over an insulating layer | Bich-Yen Nguyen, Voon-Yew Thean | 2008-09-02 |
| 7402477 | Method of making a multiple crystal orientation semiconductor device | Bich-Yen Nguyen, Ted R. White | 2008-07-22 |
| 7378306 | Selective silicon deposition for planarized dual surface orientation integration | Gregory S. Spencer, Peter J. Beckage, Veer Dhandapani | 2008-05-27 |
| 7285452 | Method to selectively form regions having differing properties and structure | Bich-Yen Nguyen, Voon-Yew Thean, Ted R. White | 2007-10-23 |
| 7282402 | Method of making a dual strained channel semiconductor device | Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Voon-Yew Thean, Shawn George Thomas +1 more | 2007-10-16 |
| 7265004 | Electronic devices including a semiconductor layer and a process for forming the same | Voon-Yew Thean, Brian J. Goolsby, Linda B. McCormick, Bich-Yen Nguyen, Colita M. Parker +3 more | 2007-09-04 |
| 7241647 | Graded semiconductor layer | Shawn George Thomas, Ted R. White, Chun-Li Liu, Alexander L. Barr, Bich-Yen Nguyen +1 more | 2007-07-10 |
| 7226833 | Semiconductor device structure and method therefor | Ted R. White, Alexander L. Barr, Bich-Yen Nguyen, Marius Orlowski, Voon-Yew Thean | 2007-06-05 |
| 7208357 | Template layer formation | Alexander L. Barr, Bich-Yen Nguyen, Voon-Yew Thean, Ted R. White | 2007-04-24 |
| 7205210 | Semiconductor structure having strained semiconductor and method therefor | Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Voon-Yew Thean, Ted R. White | 2007-04-17 |
| 7163903 | Method for making a semiconductor structure using silicon germanium | Marius Orlowski, Alexander L. Barr, Ted R. White | 2007-01-16 |
| 7160769 | Channel orientation to enhance transistor performance | Ted R. White, Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Voon-Yew Thean | 2007-01-09 |
| 7067868 | Double gate device having a heterojunction source/drain and strained channel | Voon-Yew Thean, Ted R. White, Alexander L. Barr, Venkat R. Kolagunta, Bich-Yen Nguyen +2 more | 2006-06-27 |
| 7056778 | Semiconductor layer formation | Chun-Li Liu, Alexander L. Barr, Bich-Yen Nguyen, Voon-Yew Thean, Shawn George Thomas +2 more | 2006-06-06 |
| 7037795 | Low RC product transistors in SOI semiconductor process | Alexander L. Barr, Olubunmi O. Adetutu, Bich-Yen Nguyen, Marius Orlowski, Voon-Yew Thean +1 more | 2006-05-02 |
| 7029980 | Method of manufacturing SOI template layer | Chun-Li Liu, Marius Orlowski, Matthew W. Stoker, Philip J. Tobin, Alexander L. Barr +4 more | 2006-04-18 |