Issued Patents All Time
Showing 101–125 of 134 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6444512 | Dual metal gate transistors for CMOS process | Sucharita Madhukar | 2002-09-03 |
| 6413819 | Memory device and method for using prefabricated isolated storage elements | Sufi Zafar, Ramachandran Muralidhar, Sucharita Madhukar, Daniel T. Pham, Michael A. Sadd +1 more | 2002-07-02 |
| 6365474 | Method of fabricating an integrated circuit | Jeffrey M. Finder, Kurt Eisenbeiser | 2002-04-02 |
| 6362071 | Method for forming a semiconductor device with an opening in a dielectric layer | William J. Taylor, Jr., Philip J. Tobin, David L. O'Meara, Percy V. Gilbert, Yeong-Jyh T. Lii +1 more | 2002-03-26 |
| 6344403 | Memory device and method for manufacture | Sucharita Madhukar, Ramachandran Muralidhar, David L. O'Meara, Kristen C. Smith | 2002-02-05 |
| 6297095 | Memory device that includes passivated nanoclusters and method for manufacture | Ramachandran Muralidhar, Chitra Subramanian, Sucharita Madhukar, Bruce E. White, Michael A. Sadd +2 more | 2001-10-02 |
| 6184072 | Process for forming a high-K gate dielectric | Vidya Kaushik, Olubunmi O. Adetutu, Christopher C. Hobbs | 2001-02-06 |
| 6084279 | Semiconductor device having a metal containing layer overlying a gate dielectric | J. Olufemi Olowolafe, Bikas Maiti, Olubunmi O. Adetutu, Philip J. Tobin | 2000-07-04 |
| 5897343 | Method of making a power switching trench MOSFET having aligned source regions | Leo Mathew, Keith Kamekona, Huy Trong Tran, Prasad Venkatraman, Jeffrey Pearse | 1999-04-27 |
| 5665620 | Method for forming concurrent top oxides using reoxidized silicon in an EPROM | Sergio A. Ajuria, Wayne M. Paulson, Jon Dahm | 1997-09-09 |
| 5639687 | Method for forming an integrated circuit pattern on a semiconductor substrate using silicon-rich silicon nitride | Bernard J. Roman, Chandrasekaram Ramiah | 1997-06-17 |
| 5567958 | High-performance thin-film transistor and SRAM memory cell | Marius Orlowski, James D. Hayden | 1996-10-22 |
| 5543635 | Thin film transistor and method of formation | Thomas F. McNelly, Philip J. Tobin, James D. Hayden | 1996-08-06 |
| 5538922 | Method for forming contact to a semiconductor device | Kent J. Cooper, Jung-Hui Lin, Scott S. Roth, Bernard J. Roman, Carlos Mazure +1 more | 1996-07-23 |
| 5539216 | Monolithic semiconductor body with convex structure | Marius Orlowski, Philip J. Tobin, Jim Hayden, Jack M. Higman | 1996-07-23 |
| 5539249 | Method and structure for forming an integrated circuit pattern on a semiconductor substrate | Bernard J. Roman, Chandrasekaram Ramiah | 1996-07-23 |
| 5510278 | Method for forming a thin film transistor | Thomas F. McNelly, Philip J. Tobin, James D. Hayden | 1996-04-23 |
| 5422300 | Method for forming electrical isolation in an integrated circuit | James R. Pfiester, Prashant U. Kenkare, Kent J. Cooper | 1995-06-06 |
| 5408130 | Interconnection structure for conductive layers | Michael P. Woo, James D. Hayden, Richard D. Sivan, Howard C. Kirsch | 1995-04-18 |
| 5378659 | Method and structure for forming an integrated circuit pattern on a semiconductor substrate | Bernard J. Roman, Chandrasekaram Ramiah | 1995-01-03 |
| 5300187 | Method of removing contaminants | Israel A. Lesk, Young Limb, Philip J. Tobin, John G. Franka, Paul T. Lin +2 more | 1994-04-05 |
| 5262352 | Method for forming an interconnection structure for conductive layers | Michael P. Woo, James D. Hayden, Richard D. Sivan, Howard C. Kirsch | 1993-11-16 |
| 5235189 | Thin film transistor having a self-aligned gate underlying a channel region | James D. Hayden | 1993-08-10 |
| 5219793 | Method for forming pitch independent contacts and a semiconductor device having the same | Kent J. Cooper, Jung-Hui Lin, Scott S. Roth, Bernard J. Roman, Carlos Mazure +1 more | 1993-06-15 |
| 5208189 | Process for plugging defects in a dielectric layer of a semiconductor device | Philip J. Tobin | 1993-05-04 |