Issued Patents All Time
Showing 1–25 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6136678 | Method of processing a conductive layer and forming a semiconductor device | Olubunmi O. Adetutu, Chitra Subramanian, Archana Redkar, Anthony Mark Miscione, Mark G. Fernandes | 2000-10-24 |
| 5958508 | Process for forming a semiconductor device | Olubunmi O. Adetutu, Dean J. Denning, Chitra Subramanian, Arkalgud R. Sitaram | 1999-09-28 |
| 5824579 | Method of forming shared contact structure | Chitra Subramanian | 1998-10-20 |
| 5721167 | Process for forming a semiconductor device and a static-random-access memory cell | Chitra Subramanian, Olubunmi O. Adetutu, Dean J. Denning, Arkalgud R. Sitaram | 1998-02-24 |
| 5668021 | Process for fabricating a semiconductor device having a segmented channel region | Chitra Subramanian | 1997-09-16 |
| 5665202 | Multi-step planarization process using polishing at two different pad pressures | Chitra Subramanian, Asanga H. Perera, Subramoney Iyer | 1997-09-09 |
| 5624854 | Method of formation of bipolar transistor having reduced parasitic capacitance | Robert C. Taft | 1997-04-29 |
| 5567958 | High-performance thin-film transistor and SRAM memory cell | Marius Orlowski, Bich-Yen Nguyen | 1996-10-22 |
| 5543635 | Thin film transistor and method of formation | Bich-Yen Nguyen, Thomas F. McNelly, Philip J. Tobin | 1996-08-06 |
| 5510278 | Method for forming a thin film transistor | Bich-Yen Nguyen, Thomas F. McNelly, Philip J. Tobin | 1996-04-23 |
| 5504363 | Semiconductor device | Robert C. Taft | 1996-04-02 |
| 5498889 | Semiconductor device having increased capacitance and method for making the same | — | 1996-03-12 |
| 5485420 | Static-random-access memory cell and an integrated circuit having a static-random-access memory cell | Craig S. Lage, Frank K. Baker, Jr., Kent J. Cooper | 1996-01-16 |
| 5473185 | Static-random-access memory cell with channel stops having differing doping concentrations | James R. Pfiester | 1995-12-05 |
| 5459688 | Semiconductor memory cell and fabrication process | James R. Pfiester | 1995-10-17 |
| 5451543 | Straight sidewall profile contact opening to underlying interconnect and method for making the same | Michael P. Woo, Robert Chebi | 1995-09-19 |
| 5418393 | Thin-film transistor with fully gated channel region | — | 1995-05-23 |
| 5413948 | Method for forming a dual transistor structure | James R. Pfiester | 1995-05-09 |
| 5408130 | Interconnection structure for conductive layers | Michael P. Woo, Richard D. Sivan, Howard C. Kirsch, Bich-Yen Nguyen | 1995-04-18 |
| 5407847 | Method for fabricating a semiconductor device having a shallow doped region | James R. Pfiester, David Burnett | 1995-04-18 |
| 5405806 | Method for forming a metal silicide interconnect in an integrated circuit | James R. Pfiester, Michael P. Woo | 1995-04-11 |
| 5398200 | Vertically formed semiconductor random access memory device | Carlos Mazure, Jon T. Fitch, Keith E. Witek | 1995-03-14 |
| 5393689 | Process for forming a static-random-access memory cell | James R. Pfiester | 1995-02-28 |
| 5376562 | Method for forming vertical transistor structures having bipolar and MOS devices | Jon T. Fitch, Carlos Mazure, Keith E. Witek | 1994-12-27 |
| 5377139 | Process forming an integrated circuit | Craig S. Lage, Frank K. Baker, Jr., Kent J. Cooper | 1994-12-27 |