Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6146250 | Process for forming a semiconductor device | Rajan Nagabushnam | 2000-11-14 |
| 6045435 | Low selectivity chemical mechanical polishing (CMP) process for use on integrated circuit metal interconnects | Rajeev Bajaj, Thom Kobayashi, Jaime Saravia, Mark G. Fernandes, David Watts | 2000-04-04 |
| 6012970 | Process for forming a semiconductor device | Rajan Nagabushnam | 2000-01-11 |
| 6001726 | Method for using a conductive tungsten nitride etch stop layer to form conductive interconnects and tungsten nitride contact structure | Rajan Nagabushnam, Rajeev Bajaj, Ram Venkataraman, Shyam Mattay | 1999-12-14 |
| 5885856 | Integrated circuit having a dummy structure and method of making | Percy V. Gilbert, Bradley P. Smith, Matthew A. Thompson, Kevin Kemp, Rajive Dhar | 1999-03-23 |
| 5882243 | Method for polishing a semiconductor wafer using dynamic control | Sanjit Das, Olubunmi O. Adetutu, Rajeev Bajaj | 1999-03-16 |
| 5665202 | Multi-step planarization process using polishing at two different pad pressures | Chitra Subramanian, Asanga H. Perera, James D. Hayden | 1997-09-09 |