Issued Patents All Time
Showing 1–25 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10825512 | Memory reads of weight values | Thomas Jew, Ronald J. Syzdek | 2020-11-03 |
| 9401207 | Pseudo SRAM using resistive elements for non-volatile storage | Anirban Roy | 2016-07-26 |
| 9378812 | Non-volatile memory using bi-directional resistive elements | — | 2016-06-28 |
| 9318158 | Non-volatile memory using bi-directional resistive elements | Perry H. Pelley, Ravindraraj Ramaraju | 2016-04-19 |
| 9276008 | Embedded NVM in a HKMG process | Jon D. Cheek | 2016-03-01 |
| 9129996 | Non-volatile memory (NVM) cell and high-K and metal gate transistor integration | Cheong Min Hong | 2015-09-08 |
| 9111865 | Method of making a logic transistor and a non-volatile memory (NVM) cell | Mehul D. Shroff, Mark D. Hall | 2015-08-18 |
| 9087913 | Integration technique using thermal oxide select gate dielectric for select gate and apartial replacement gate for logic | Mark D. Hall, Mehul D. Shroff | 2015-07-21 |
| 9054220 | Embedded NVM in a HKMG process | Jon D. Cheek | 2015-06-09 |
| 8951863 | Non-volatile memory (NVM) and logic integration | Mark D. Hall, Mehul D. Shroff | 2015-02-10 |
| 8741719 | Integrating formation of a logic transistor and a non-volatile memory cell using a partial replacement gate technique | Mark D. Hall, Mehul D. Shroff | 2014-06-03 |
| 8716089 | Integrating formation of a replacement gate transistor and a non-volatile memory cell having thin film storage | Mark D. Hall, Mehul D. Shroff | 2014-05-06 |
| 8713406 | Erasing a non-volatile memory (NVM) system having error correction code (ECC) | Fuchen Mu, Chen He | 2014-04-29 |
| 8669158 | Non-volatile memory (NVM) and logic integration | Mark D. Hall, Mehul D. Shroff | 2014-03-11 |
| 8524557 | Integration technique using thermal oxide select gate dielectric for select gate and replacement gate for logic | Mark D. Hall, Mehul D. Shroff | 2013-09-03 |
| 8473710 | Multiple partitioned emulated electrically erasable (EEE) memory and method of operation | Ross S. Scouller, Venkatagiri Chandrasekaran | 2013-06-25 |
| 8438327 | Recovery scheme for an emulated memory system | Ross S. Scouller, Daniel L. Andre, Stephen F. McGinty | 2013-05-07 |
| 8341372 | Emulated electrically erasable (EEE) memory and method of operation | Ross S. Scouller, Venkatagiri Chandrasekaran | 2012-12-25 |
| 7764550 | Method of programming a non-volatile memory | Mohammed Suhail, Gowrishankar L. Chindalore | 2010-07-27 |
| 7432547 | Non-volatile memory device with improved data retention and method therefor | Gowrishankar L. Chindalore, Paul A. Ingersoll, Alexander B. Hoefler | 2008-10-07 |
| 7269090 | Memory access with consecutive addresses corresponding to different rows | James D. Burnett, Thomas Jew | 2007-09-11 |
| 7135370 | Dielectric storage memory cell having high permittivity top dielectric and method therefor | — | 2006-11-14 |
| 6898129 | Erase of a memory having a non-conductive storage medium | Craig T. Swift, Erwin J. Prinz, Paul A. Ingersoll | 2005-05-24 |
| 6828618 | Split-gate thin-film storage NVM cell | Alexander B. Hoefler, Erwin J. Prinz | 2004-12-07 |
| 6812517 | Dielectric storage memory cell having high permittivity top dielectric and method therefor | — | 2004-11-02 |