Issued Patents All Time
Showing 1–25 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9455260 | Methods and structures for multiport memory devices | Perry H. Pelley | 2016-09-27 |
| 9123545 | Semiconductor device with single-event latch-up prevention circuitry | Jianan Yang, Brad J. Garni, Thomas W. Liston | 2015-09-01 |
| 9111634 | Methods and structures for multiport memory devices | Perry H. Pelley | 2015-08-18 |
| 9111638 | SRAM bit cell with reduced bit line pre-charge voltage | Perry H. Pelley | 2015-08-18 |
| 8947970 | Word line driver circuits and methods for SRAM bit cell with reduced bit line pre-charge voltage | Perry H. Pelley | 2015-02-03 |
| 8836371 | Systems and methods for reduced coupling between digital signal lines | Perry H. Pelley | 2014-09-16 |
| 8766703 | Method and apparatus for sensing on-chip characteristics | Jianan Yang, Mark W. Jetton, Thomas W. Liston | 2014-07-01 |
| 8685800 | Single event latch-up prevention techniques for a semiconductor device | Jianan Yang, Brad J. Garni, Thomas W. Liston, Huy Van Pham | 2014-04-01 |
| 8659322 | Memory having a latching sense amplifier resistant to negative bias temperature instability and method therefor | Alexander B. Hoefler, Scott I. Remington | 2014-02-25 |
| 8643066 | Multiple device types including an inverted-T channel transistor and method therefor | Byoung Min, Leo Mathew | 2014-02-04 |
| 8633515 | Transistors with immersed contacts | Marius Orlowski | 2014-01-21 |
| 8531899 | Methods for testing a memory embedded in an integrated circuit | Shayan Zhang, Kent P. Fancher, Andrew C. Russell, Michael D. Snyder | 2013-09-10 |
| 8379466 | Integrated circuit having an embedded memory and method for testing the memory | Shayan Zhang, Kent P. Fancher, Andrew C. Russell, Michael D. Snyder | 2013-02-19 |
| 8314448 | Transistors with immersed contacts | Marius Orlowski | 2012-11-20 |
| 8283244 | Method for forming one transistor DRAM cell structure | Brian A. Winstead | 2012-10-09 |
| 8156357 | Voltage-based memory size scaling in a data processing system | Shayan Zhang, Prashant U. Kenkare, Hema Ramamurthy, Andrew C. Russell, Michael D. Snyder | 2012-04-10 |
| 8088657 | Integrated circuit using FinFETs and having a static random access memory (SRAM) | Leo Mathew, Byoung W. Min | 2012-01-03 |
| 7986006 | Single transistor memory cell with reduced recombination rates | Marius Orlowski | 2011-07-26 |
| 7968394 | Transistor with immersed contacts and methods of forming thereof | Marius Orlowski | 2011-06-28 |
| 7939412 | Process for forming an electronic device including a fin-type transistor structure | Marius Orlowski | 2011-05-10 |
| 7824988 | Method of forming an integrated circuit | Alexander B. Hoefler, Lawrence N. Herr | 2010-11-02 |
| 7800959 | Memory having self-timed bit line boost circuit and method therefor | Lawrence F. Childs, Craig D. Gunderson, Olga R. Lu | 2010-09-21 |
| 7799644 | Transistor with asymmetry for data storage circuitry | Ted R. White, Brian A. Winstead | 2010-09-21 |
| 7754560 | Integrated circuit using FinFETs and having a static random access memory (SRAM) | Leo Mathew, Byoung W. Min | 2010-07-13 |
| 7733711 | Circuit and method for optimizing memory sense amplifier timing | Alexander B. Hoefler | 2010-06-08 |