Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9317087 | Memory column drowsy control | Ravindraraj Ramaraju, Jianan Yang, Mark W. Jetton, George P. Hoekstra, Andrew C. Russell | 2016-04-19 |
| 9263100 | Bypass system and method that mimics clock to data memory read timing | Bradley J. Garni, Huy Van Pham, Glenn E. Starnes, Mark W. Jetton | 2016-02-16 |
| 9123545 | Semiconductor device with single-event latch-up prevention circuitry | Jianan Yang, James D. Burnett, Brad J. Garni | 2015-09-01 |
| 9026808 | Memory with word level power gating | Jianan Yang, Mark W. Jetton | 2015-05-05 |
| 8766703 | Method and apparatus for sensing on-chip characteristics | Jianan Yang, James D. Burnett, Mark W. Jetton | 2014-07-01 |
| 8717829 | System and method for soft error detection in memory devices | Ashish Sharma, James B. Eifert, Amit Gupta, Jehoda Refaeli | 2014-05-06 |
| 8685800 | Single event latch-up prevention techniques for a semiconductor device | Jianan Yang, James D. Burnett, Brad J. Garni, Huy Van Pham | 2014-04-01 |
| 7940599 | Dual port memory device | Olga R. Lu, Lawrence F. Childs | 2011-05-10 |
| 7706207 | Memory with level shifting word line driver and method thereof | Shahnaz P. Chowdhury-Nagle, Perry H. Pelley | 2010-04-27 |
| 7554841 | Circuit for storing information in an integrated circuit and method therefor | — | 2009-06-30 |
| 7440354 | Memory with level shifting word line driver and method thereof | Shahnaz P. Chowdhury-Nagle, Perry H. Pelley | 2008-10-21 |
| 6590818 | Method and apparatus for soft defect detection in a memory | Lawrence N. Herr | 2003-07-08 |