Issued Patents All Time
Showing 1–25 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11543849 | Integrated clock gater latch structures with adjustable output reset | Kenneth Hicks, Sumeer Goel | 2023-01-03 |
| 10013192 | Soft error detection in a memory system | — | 2018-07-03 |
| 9823962 | Soft error detection in a memory system | — | 2017-11-21 |
| 9400711 | Content addressable memory with error detection | Ravindraraj Ramaraju, Mihir Pandya | 2016-07-26 |
| 9367437 | Method and apparatus for reducing the number of speculative accesses to a memory array | Ravindraraj Ramaraju | 2016-06-14 |
| 9367475 | System and method for cache access | Ravindraraj Ramaraju, David R. Bearden | 2016-06-14 |
| 9317087 | Memory column drowsy control | Ravindraraj Ramaraju, Jianan Yang, Mark W. Jetton, Thomas W. Liston, George P. Hoekstra | 2016-04-19 |
| 9310829 | System with feature of saving dynamic power of flip-flop banks | — | 2016-04-12 |
| 9224439 | Memory with word line access control | Ravindraraj Ramaraju, George P. Hoekstra | 2015-12-29 |
| 9141451 | Memory having improved reliability for certain data types | Ravindraraj Ramaraju | 2015-09-22 |
| 9141552 | Memory using voltage to improve reliability for certain data types | Ravindraraj Ramaraju | 2015-09-22 |
| 9117498 | Memory with power savings for unnecessary reads | Ravindraraj Ramaraju, George P. Hoekstra | 2015-08-25 |
| 9087702 | Edge coupling of semiconductor dies | Tim V. Pham, Michael B. McShane, Perry H. Pelley, James R. Guajardo | 2015-07-21 |
| 9081719 | Selective memory scrubbing based on data type | Ravindraraj Ramaraju, William C. Moyer | 2015-07-14 |
| 9081693 | Data type dependent memory scrubbing | Ravindraraj Ramaraju, William C. Moyer | 2015-07-14 |
| 8837205 | Multi-port register file with multiplexed data | Perry H. Pelley, Ravindraraj Ramaraju | 2014-09-16 |
| 8755244 | Write contention-free, noise-tolerant multi-port bitcell | Ambica Ashok, Ravindraraj Ramaraju | 2014-06-17 |
| 8739165 | Shared resource based thread scheduling with affinity and/or selectable criteria | William C. Moyer | 2014-05-27 |
| 8710916 | Electronic circuit having shared leakage current reduction circuits | Ravindraraj Ramaraju, David R. Bearden, Shayan Zhang | 2014-04-29 |
| 8634263 | Integrated circuit having memory repair information storage and method therefor | Prashant U. Kenkare, Troy L. Cooper, Shayan Zhang | 2014-01-21 |
| 8566620 | Data processing having multiple low power modes and method therefor | Ravindraraj Ramaraju, Shayan Zhang | 2013-10-22 |
| 8537625 | Memory voltage regulator with leakage current voltage control | Ravindraraj Ramaraju, Shayan Zhang, Kenneth R. Burch, Charles E. Seaberg | 2013-09-17 |
| 8531899 | Methods for testing a memory embedded in an integrated circuit | Shayan Zhang, James D. Burnett, Kent P. Fancher, Michael D. Snyder | 2013-09-10 |
| 8514611 | Memory with low voltage mode operation | Huy B. Nguyen, Troy L. Cooper, Ravindraraj Ramaraju | 2013-08-20 |
| 8400819 | Integrated circuit having variable memory array power supply voltage | — | 2013-03-19 |