Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7940599 | Dual port memory device | Olga R. Lu, Thomas W. Liston | 2011-05-10 |
| 7800959 | Memory having self-timed bit line boost circuit and method therefor | Craig D. Gunderson, Olga R. Lu, James D. Burnett | 2010-09-21 |
| 7746716 | Memory having a dummy bitline for timing control | Mark W. Jetton, Olga R. Lu, Glenn E. Starnes | 2010-06-29 |
| 7292485 | SRAM having variable power supply and method therefor | Olga R. Lu, Craig D. Gunderson | 2007-11-06 |
| 5670815 | Layout for noise reduction on a reference voltage | Stephen T. Flannagan, Ray L. Chang, Donovan Raatz | 1997-09-23 |
| 5477176 | Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory | Ray L. Chang, Kenneth W. Jones, Donovan Raatz, Stephen T. Flannagan | 1995-12-19 |
| 5440514 | Write control for a memory using a delay locked loop | Stephen T. Flannagan, Ray L. Chang | 1995-08-08 |
| 5426381 | Latching ECL to CMOS input buffer circuit | Stephen T. Flannagan | 1995-06-20 |
| 5416744 | Memory having bit line load with automatic bit line precharge and equalization | Stephen T. Flannagan | 1995-05-16 |
| 5400274 | Memory having looped global data lines for propagation delay matching | Kenneth W. Jones | 1995-03-21 |
| 5384737 | Pipelined memory having synchronous and asynchronous operating modes | Kenneth W. Jones, Stephen T. Flannagan, Ray L. Chang | 1995-01-24 |