Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9263100 | Bypass system and method that mimics clock to data memory read timing | Huy Van Pham, Glenn E. Starnes, Mark W. Jetton, Thomas W. Liston | 2016-02-16 |
| 8319548 | Integrated circuit having low power mode voltage regulator | Ravindraraj Ramaraju, David R. Bearden, Kenneth R. Burch, Charles E. Seaberg, Hector Sanchez | 2012-11-27 |
| 7154772 | MRAM architecture with electrically isolated read and write circuitry | Joseph J. Nahas, Thomas Andre, Chitra Subramanian, Mark Durlam | 2006-12-26 |
| 7038959 | MRAM sense amplifier having a precharge circuit and method for sensing | — | 2006-05-02 |
| 6909631 | MRAM and methods for reading the MRAM | Mark Durlam, Thomas Andre, Mark Deherrera, Bradley N. Engel, Joseph J. Nahas +2 more | 2005-06-21 |
| 6903964 | MRAM architecture with electrically isolated read and write circuitry | Joseph J. Nahas, Thomas Andre, Chitra Subramanian, Mark Durlam | 2005-06-07 |
| 6894937 | Accelerated life test of MRAM cells | Thomas Andre, Joseph J. Nahas | 2005-05-17 |
| 6888743 | MRAM architecture | Mark Durlam, Thomas Andre, Brian R. Butcher, Mark Deherrera, Bradley N. Engel +5 more | 2005-05-03 |
| 6838721 | Integrated circuit with a transitor over an interconnect layer | Perry H. Pelley | 2005-01-04 |
| 6760266 | Sense amplifier and method for performing a read operation in a MRAM | Mark Deherrera, Mark Durlam, Bradley N. Engel, Thomas Andre, Joseph J. Nahas +1 more | 2004-07-06 |
| 6738303 | Technique for sensing the state of a magneto-resistive random access memory | Chitra Subramanian | 2004-05-18 |
| 6700814 | Sense amplifier bias circuit for a memory having at least two distinct resistance states | Joseph J. Nahas, Thomas Andre | 2004-03-02 |
| 6657889 | Memory having write current ramp rate control | Chitra Subramanian, Thomas Andre, Halbert S. Lin, Joseph J. Nahas | 2003-12-02 |
| 6621729 | Sense amplifier incorporating a symmetric midpoint reference | Chitra Subramanian, Joseph J. Nahas, Thomas Andre | 2003-09-16 |
| 6600690 | Sense amplifier for a memory having at least two distinct resistance states | Joseph J. Nahas, Thomas Andre, Chitra Subramanian | 2003-07-29 |
| 6580298 | Three input sense amplifier and method of operation | Chitra Subramanian, Joseph J. Nahas, Thomas Andre | 2003-06-17 |
| 6538940 | Method and circuitry for identifying weak bits in an MRAM | Joseph J. Nahas, Thomas Andre | 2003-03-25 |