Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11233663 | Physically unclonable function having source bias transistors | Alexander B. Hoefler, Glenn C. Abeln, Nihaar N. Mahatme | 2022-01-25 |
| 11056161 | Data processing system and method for generating a digital code with a physically unclonable function | Nihaar N. Mahatme, Alexander B. Hoefler | 2021-07-06 |
| 10574469 | Physically unclonable function and method for generating a digital code | Nihaar N. Mahatme, Alexander B. Hoefler | 2020-02-25 |
| 10453544 | Memory array with read only cells having multiple states and method of programming thereof | Jianan Yang, Shayan Zhang | 2019-10-22 |
| 9123545 | Semiconductor device with single-event latch-up prevention circuitry | Jianan Yang, James D. Burnett, Thomas W. Liston | 2015-09-01 |
| 8995178 | SRAM with embedded ROM | Jianan Yang, Mark W. Jetton | 2015-03-31 |
| 8685800 | Single event latch-up prevention techniques for a semiconductor device | Jianan Yang, James D. Burnett, Thomas W. Liston, Huy Van Pham | 2014-04-01 |
| 7881138 | Memory circuit with sense amplifier | Thomas Andre, Jean Lasseuguette | 2011-02-01 |
| 7292484 | Sense amplifier with multiple bits sharing a common reference | Thomas Andre, Joseph J. Nahas | 2007-11-06 |
| 6744663 | Circuit and method for reading a toggle memory cell | Thomas Andre, Joseph J. Nahas, Chitra Subramanian | 2004-06-01 |
| 6711068 | Balanced load memory and method of operation | Chitra Subramanian, Joseph J. Nahas, Halbert S. Lin, Thomas Andre | 2004-03-23 |
| 6693824 | Circuit and method of writing a toggle memory | Joseph J. Nahas, Thomas Andre, Chitra Subramanian | 2004-02-17 |