Issued Patents All Time
Showing 1–25 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109356 | Method and apparatus for stressing a non-volatile memory | Chen He, Richard K. Eguchi, Fuchen Mu, Benjamin A. Schmid, Yanzhuo Wang | 2018-10-23 |
| 9728410 | Split-gate non-volatile memory (NVM) cell and method therefor | Asanga H. Perera | 2017-08-08 |
| 9508397 | Non-volatile memory (NVM) with endurance control | Richard K. Eguchi, Thomas Jew | 2016-11-29 |
| 9425055 | Split gate memory cell with a layer of nanocrystals with improved erase performance | Brian A. Winstead, Ko-Min Chang | 2016-08-23 |
| 9419088 | Low resistance polysilicon strap | Anirban Roy | 2016-08-16 |
| 9293207 | Embedded data and code non-volatile memory cell configurations | — | 2016-03-22 |
| 9236498 | Low resistance polysilicon strap | Anirban Roy | 2016-01-12 |
| 9136360 | Methods and structures for charge storage isolation in split-gate memory arrays | Asanga H. Perera, Ko-Min Chang | 2015-09-15 |
| 9105748 | Integration of a non-volatile memory (NVM) cell and a logic transistor and method therefor | Asanga H. Perera | 2015-08-11 |
| 8435898 | First inter-layer dielectric stack for non-volatile memory | Olubunmi O. Adetutu, Christopher B. Hundley, Paul A. Ingersoll | 2013-05-07 |
| 7842573 | Virtual ground memory array and method therefor | Gowrishankar L. Chindalore, Laureen H. Parker | 2010-11-30 |
| 7745870 | Programming and erasing structure for a floating gate memory cell and method of making | Gowrishankar L. Chindalore | 2010-06-29 |
| 7679125 | Back-gated semiconductor device with a storage layer and methods for forming thereof | Gowrishankar L. Chindalore, Thuy B. Dao, Michael A. Sadd | 2010-03-16 |
| 7619270 | Electronic device including discontinuous storage elements | Gowrishankar L. Chindalore, Paul A. Ingersoll | 2009-11-17 |
| 7619275 | Process for forming an electronic device including discontinuous storage elements | Michael A. Sadd, Ko-Min Chang, Gowrishankar L. Chindalore, Cheong Min Hong | 2009-11-17 |
| 7592224 | Method of fabricating a storage device including decontinuous storage elements within and between trenches | Gowrishankar L. Chindalore, Paul A. Ingersoll | 2009-09-22 |
| 7582929 | Electronic device including discontinuous storage elements | Michael A. Sadd, Ko-Min Chang, Gowrishankar L. Chindalore, Cheong Min Hong | 2009-09-01 |
| 7563681 | Double-gated non-volatile memory and methods for forming thereof | Thuy B. Dao, Michael A. Sadd | 2009-07-21 |
| 7544980 | Split gate memory cell in a FinFET | Gowrishankar L. Chindalore | 2009-06-09 |
| 7518179 | Virtual ground memory array and method therefor | Gowrishankar L. Chindalore, Laureen H. Parker | 2009-04-14 |
| 7399675 | Electronic device including an array and process for forming the same | Gowrishankar L. Chindalore | 2008-07-15 |
| 7394686 | Programmable structure including discontinuous storage elements and spacer control gates in a trench | Gowrishankar L. Chindalore | 2008-07-01 |
| 7391659 | Method for multiple step programming a memory cell | Gowrishankar L. Chindalore | 2008-06-24 |
| 7317222 | Memory cell using a dielectric having non-uniform thickness | Gowrishankar L. Chindalore | 2008-01-08 |
| 7314798 | Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming | Gowrishankar L. Chindalore, Cheong Min Hong | 2008-01-01 |