Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5374573 | Method of forming a self-aligned thin film transistor | Kent J. Cooper, Scott S. Roth, Howard C. Kirsch | 1994-12-20 |
| 5373170 | Semiconductor memory device having a compact symmetrical layout | James R. Pfiester | 1994-12-13 |
| 5371026 | Method for fabricating paired MOS transistors having a current-gain differential | James R. Pfiester, Hsing-Huang Tseng | 1994-12-06 |
| 5348903 | Process for fabricating a semiconductor memory cell having thin-film driver transistors overlapping dual wordlines | James R. Pfiester | 1994-09-20 |
| 5334861 | Semiconductor memory cell | James R. Pfiester | 1994-08-02 |
| 5330929 | Method of making a six transistor static random access memory cell | James R. Pfiester | 1994-07-19 |
| 5324960 | Dual-transistor structure and method of formation | James R. Pfiester | 1994-06-28 |
| 5308997 | Self-aligned thin film transistor | Kent J. Cooper, Scott S. Roth, Howard C. Kirsch | 1994-05-03 |
| 5308782 | Semiconductor memory device and method of formation | Carlos Mazure, Jon T. Fitch, Keith E. Witek | 1994-05-03 |
| 5291053 | Semiconductor device having an overlapping memory cell | James R. Pfiester | 1994-03-01 |
| 5279976 | Method for fabricating a semiconductor device having a shallow doped region | James R. Pfiester, David Burnett | 1994-01-18 |
| 5275964 | Method for compactly laying out a pair of transistors | Frank K. Baker, Jr. | 1994-01-04 |
| 5262352 | Method for forming an interconnection structure for conductive layers | Michael P. Woo, Richard D. Sivan, Howard C. Kirsch, Bich-Yen Nguyen | 1993-11-16 |
| 5252849 | Transistor useful for further vertical integration and method of formation | Jon T. Fitch, Carlos Mazure, Keith E. Witek | 1993-10-12 |
| 5243203 | Compact transistor pair layout and method thereof | Frank K. Baker, Jr. | 1993-09-07 |
| 5241193 | Semiconductor device having a thin-film transistor and process | James R. Pfiester | 1993-08-31 |
| 5235189 | Thin film transistor having a self-aligned gate underlying a channel region | Bich-Yen Nguyen | 1993-08-10 |
| 5213989 | Method for forming a grown bipolar electrode contact using a sidewall seed | Jon T. Fitch, Carlos Mazure | 1993-05-25 |
| 5204277 | Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact | Bradley M. Somero | 1993-04-20 |
| 5198375 | Method for forming a bipolar transistor structure | Carlos Mazure, Jon T. Fitch | 1993-03-30 |
| 5194926 | Semiconductor device having an inverse-T bipolar transistor | — | 1993-03-16 |
| 5158898 | Self-aligned under-gated thin film transistor and method of formation | Bich-Yen Nguyen, Kent J. Cooper | 1992-10-27 |
| 5101257 | Semiconductor device having merged bipolar and MOS transistors and process for making the same | Thomas C. Mele, Frank K. Baker, Jr. | 1992-03-31 |
| 5070029 | Semiconductor process using selective deposition | James R. Pfiester | 1991-12-03 |
| 5061646 | Method for forming a self-aligned bipolar transistor | Richard D. Sivan | 1991-10-29 |