| 11967365 |
Bitcell architecture with time-multiplexed ports |
Yew Keong Chong, Venu Anantuni, Martin Jay Kinkade |
2024-04-23 |
$50,773,000 |
| 11664086 |
Column redundancy techniques |
Yew Keong Chong, Andy Wangkun Chen, Vivek Nautiyal |
2023-05-30 |
|
| 11501809 |
Contention-adapted read-write pulse generation circuitry |
Sanjay Mangal |
2022-11-15 |
|
| 11475944 |
Read assist circuitry for memory applications |
Rahul Mathur, Vivek Asthana, Ankur Goel, Nikhil Kaushik, Rachit Ahuja +1 more |
2022-10-18 |
|
| 11005461 |
Level shift latch circuitry |
Andy Wangkun Chen, Sai Sriharsha Manapragada, Yicong Li, Yew Keong Chong, Sanjay Mangal +1 more |
2021-05-11 |
|
| 10854280 |
Read assist circuitry for memory applications |
Abhairaj Singh, Vivek Asthana, Monu Rathore, Ankur Goel, Nikhil Kaushik +3 more |
2020-12-01 |
|
| 10839934 |
Redundancy circuitry for memory application |
Rahul Mathur, Andy Wangkun Chen, Gaurang Prabhakar Narvekar, Sanjay Mangal, Yew Keong Chong +1 more |
2020-11-17 |
|
| 10008260 |
Clock generation circuitry for memory applications |
Rahul Mathur, Sanjay Mangal |
2018-06-26 |
|
| 9997217 |
Write assist circuitry |
Ankur Goel, Munish Kumar, Nitin Jindal, Rahul Mathur, Shruti Aggarwal +1 more |
2018-06-12 |
|
| 9064559 |
Memory device and method of performing access operations within such a memory device |
Yew Keong Chong, Martin Jay Kinkade |
2015-06-23 |
$20,326,000 |
| 8611172 |
Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories |
Amaranth Shyanmugam, Vincent Phillipe Schuppe, Yew Keong Chong, Martin Jay Kinkade, Hsin-Yu Chen |
2013-12-17 |
$49,123,000 |
| 8264896 |
Integrated circuit having an array supply voltage control circuit |
Lawrence N. Herr, Rajesh R. Kini, Tam Minh Dai Tran |
2012-09-11 |
$2,894,000 |
| 8116153 |
Read only memory and method of reading same |
Manmohan Rana, Ashish Sharma |
2012-02-14 |
$2,830,000 |
| 6376349 |
Process for forming a semiconductor device and a conductive structure |
Philip J. Tobin, Olubunmi O. Adetutu |
2002-04-23 |
$22,281,000 |
| 6255204 |
Method for forming a semiconductor device |
Philip J. Tobin, Olubunmi O. Adetutu, Rama I. Hegde |
2001-07-03 |
$37,829,000 |
| 6171910 |
Method for forming a semiconductor device |
Christopher C. Hobbs, Wei E. Wu |
2001-01-09 |
$31,210,000 |
| 6084279 |
Semiconductor device having a metal containing layer overlying a gate dielectric |
Bich-Yen Nguyen, J. Olufemi Olowolafe, Olubunmi O. Adetutu, Philip J. Tobin |
2000-07-04 |
|
| 6049114 |
Semiconductor device having a metal containing layer overlying a gate dielectric |
Jon J. Candelaria, Jian Chen |
2000-04-11 |
$41,295,000 |
| 6027961 |
CMOS semiconductor devices and method of formation |
Philip J. Tobin, C. Joseph Mogab, Christopher C. Hobbs, Larry E. Frisa |
2000-02-22 |
$151,169,000 |
| 6020024 |
Method for forming high dielectric constant metal oxides |
Philip J. Tobin, Rama I. Hegde, Jesus Cuellar |
2000-02-01 |
$54,037,000 |
| 5885870 |
Method for forming a semiconductor device having a nitrided oxide dielectric layer |
Philip J. Tobin, Sergio A. Ajuria |
1999-03-23 |
$12,098,000 |
| 5861347 |
Method for forming a high voltage gate dielectric for use in integrated circuit |
Wayne M. Paulson, James Heddleson |
1999-01-19 |
$13,475,000 |
| 5830802 |
Process for reducing halogen concentration in a material layer during semiconductor device fabrication |
Hsing-Huang Tseng, Philip J. Tobin |
1998-11-03 |
$6,768,000 |
