| 12499917 |
Inrush current management in a memory array |
Yew Keong Chong |
2025-12-16 |
|
| 12499967 |
Row repair circuitry |
Khushal Gelda, Ramesh Manohar, Teresa Louise McLaurin, Prashant Madhukar Kulkarni |
2025-12-16 |
|
| 12449890 |
Power saving mode control for a memory instance |
Yew Keong Chong, Sriram Thyagarajan, Munish Kumar, Vivek Asthana, Andrew John Turner +1 more |
2025-10-21 |
|
| 12300310 |
Multi-port bitcell architecture |
Vianney Choserot, Yew Keong Chong, Sriram Thyagarajan |
2025-05-13 |
|
| 12300338 |
Configurable scan chain architecture for multi-port memory |
Vianney Choserot, Yew Keong Chong, Khushal Gelda |
2025-05-13 |
|
| 12218664 |
Backside power supply techniques |
Sriram Thyagarajan, Yew Keong Chong, Ayush Kulshrestha, Sony, Rajiv Kumar Sisodia |
2025-02-04 |
|
| 12164855 |
Metal routing techniques |
Sriram Thyagarajan, Yew Keong Chong, Sony |
2024-12-10 |
$74,183,000 |
| 12087357 |
Multi-port memory architecture |
Yew Keong Chong, Sriram Thyagarajan, Arjun Singh, Ayush Kulshrestha |
2024-09-10 |
$55,532,000 |
| 12066855 |
Multi-port circuit architecture |
Yew Keong Chong, Sriram Thyagarajan, Akash Bangalore Srinivasa, Munish Kumar, Khushal Gelda +1 more |
2024-08-20 |
$30,526,000 |
| 12066926 |
Circuitry for memory address collision prevention |
Yew Keong Chong, Sriram Thyagarajan |
2024-08-20 |
$30,526,000 |
| 11901290 |
Bitcell architecture using buried metal |
Rajiv Kumar Sisodia |
2024-02-13 |
$35,462,000 |
| 11900995 |
Wordline modulation techniques |
Rajiv Kumar Sisodia, Sriram Thyagarajan, Yew Keong Chong, Ayush Kulshrestha, Munish Kumar |
2024-02-13 |
$35,462,000 |
| 11862271 |
Memory testing techniques |
Yannis Jallamion-Grive, Cyrille Dray |
2024-01-02 |
$13,767,000 |
| 11837543 |
Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network |
Sriram Thyagarajan, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2023-12-05 |
$23,199,000 |
| 11831341 |
Data compressor logic circuit |
Shardendu Shekhar, Yew Keong Chong |
2023-11-28 |
$17,453,000 |
| 11688444 |
Wordline driver architecture |
Akash Bangalore Srinivasa, Yew Keong Chong, Sreebin Sreedhar, Balaji Ravikumar, Penaka Phani Goberu +1 more |
2023-06-27 |
|
| 11676656 |
Memory architecture with DC biasing |
Yew Keong Chong, Rajiv Kumar Sisodia, Sriram Thyagarajan |
2023-06-13 |
|
| 11670363 |
Multi-tier memory architecture |
Rahul Mathur, Mudit Bhargava |
2023-06-06 |
|
| 11664086 |
Column redundancy techniques |
Yew Keong Chong, Bikas Maiti, Vivek Nautiyal |
2023-05-30 |
|
| 11631439 |
Flexible sizing and routing architecture |
Sriram Thyagarajan, Yew Keong Chong, Munish Kumar, Rajiv Kumar Sisodia |
2023-04-18 |
|
| 11624777 |
Slew-load characterization |
Sriram Thyagarajan, Pratik Ghanshambhai Satasia, Yew Keong Chong, Mouli Rajaram Chollangi |
2023-04-11 |
|
| 11586445 |
Modular gated multiplier circuitry and multiplication technique |
Shardendu Shekhar, Anil Kumar Baratam, James Dennis Dodrill, Yew Keong Chong |
2023-02-21 |
|
| 11569219 |
TSV coupled integrated circuits and methods |
Rahul Mathur, Xiaoqing Xu, Mudit Bhargava, Brian Tracy Cline, Saurabh Sinha |
2023-01-31 |
|
| 11568926 |
Latch circuitry for memory applications |
Teresa Louise McLaurin, Frank David Frederick, Richard Slobodnik, Yew Keong Chong |
2023-01-31 |
|
| 11557583 |
Cell architecture |
Sriram Thyagarajan, Yew Keong Chong, Sony |
2023-01-17 |
|
