| 12449890 |
Power saving mode control for a memory instance |
Andy Wangkun Chen, Yew Keong Chong, Munish Kumar, Vivek Asthana, Andrew John Turner +1 more |
2025-10-21 |
|
| 12300310 |
Multi-port bitcell architecture |
Vianney Choserot, Andy Wangkun Chen, Yew Keong Chong |
2025-05-13 |
|
| 12218664 |
Backside power supply techniques |
Yew Keong Chong, Andy Wangkun Chen, Ayush Kulshrestha, Sony, Rajiv Kumar Sisodia |
2025-02-04 |
|
| 12164855 |
Metal routing techniques |
Yew Keong Chong, Sony, Andy Wangkun Chen |
2024-12-10 |
$74,183,000 |
| 12087357 |
Multi-port memory architecture |
Yew Keong Chong, Andy Wangkun Chen, Arjun Singh, Ayush Kulshrestha |
2024-09-10 |
$55,532,000 |
| 12066926 |
Circuitry for memory address collision prevention |
Andy Wangkun Chen, Yew Keong Chong |
2024-08-20 |
$30,526,000 |
| 12066855 |
Multi-port circuit architecture |
Andy Wangkun Chen, Yew Keong Chong, Akash Bangalore Srinivasa, Munish Kumar, Khushal Gelda +1 more |
2024-08-20 |
$30,526,000 |
| 11900995 |
Wordline modulation techniques |
Rajiv Kumar Sisodia, Andy Wangkun Chen, Yew Keong Chong, Ayush Kulshrestha, Munish Kumar |
2024-02-13 |
$35,462,000 |
| 11837543 |
Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network |
Andy Wangkun Chen, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2023-12-05 |
$23,199,000 |
| 11676656 |
Memory architecture with DC biasing |
Andy Wangkun Chen, Yew Keong Chong, Rajiv Kumar Sisodia |
2023-06-13 |
|
| 11631439 |
Flexible sizing and routing architecture |
Yew Keong Chong, Munish Kumar, Andy Wangkun Chen, Rajiv Kumar Sisodia |
2023-04-18 |
|
| 11624777 |
Slew-load characterization |
Pratik Ghanshambhai Satasia, Yew Keong Chong, Andy Wangkun Chen, Mouli Rajaram Chollangi |
2023-04-11 |
|
| 11567741 |
Memory compiler techniques |
Mouli Rajaram Chollangi, Hongwei Zhu, Yew Keong Chong, Pratik Ghanshambhai Satasia |
2023-01-31 |
|
| 11557583 |
Cell architecture |
Andy Wangkun Chen, Yew Keong Chong, Sony |
2023-01-17 |
|
| 11443777 |
Backside power rail architecture |
Andy Wangkun Chen, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-09-13 |
|
| 11380384 |
Buried power rail structure for providing multi-domain power supply for memory device |
Andy Wangkun Chen, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-07-05 |
|
| 11322197 |
Power-gating techniques with buried metal |
Rajiv Kumar Sisodia, Andy Wangkun Chen, Ayush Kulshrestha, Sony, Yew Keong Chong |
2022-05-03 |
|
| 11288432 |
Computer implemented system and method for generating a layout of a cell defining a circuit component |
Andy Wangkun Chen, Yew Keong Chong, Tom Shore, Gus Yeung, Marlin Wayne Frederick, Jr. |
2022-03-29 |
|
| 11271567 |
Buried metal technique for critical signal nets |
Andy Wangkun Chen, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-03-08 |
|
| 11200922 |
Memory multiplexing techniques |
Andy Wangkun Chen, Yew Keong Chong, Munish Kumar |
2021-12-14 |
|
| 11170843 |
Bitcell with multiple read bitlines |
Andy Wangkun Chen, Yew Keong Chong, Ettore Amirante |
2021-11-09 |
|
| 11145651 |
Transistor gate arrangement to modify driver signal characteristics |
Yew Keong Chong, Kumaraswamy Ramanathan, Damayanti Datta |
2021-10-12 |
|
| 11133043 |
Configurable control of integrated circuits |
Andy Wangkun Chen, Yew Keong Chong |
2021-09-28 |
|
| 11087834 |
Read and write techniques |
Yew Keong Chong, Andy Wangkun Chen, Pratik Ghanshambhai Satasia |
2021-08-10 |
|
| 11068639 |
Metal layout techniques |
Marlin Wayne Frederick, Jr., Ettore Amirante, Ronald Paxton Preston, Andy Wangkun Chen, Yew Keong Chong |
2021-07-20 |
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