Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11514979 | Wordline driver architecture | Andy Wangkun Chen, Munish Kumar, Ayush Kulshrestha, Rajiv Kumar Sisodia, Yew Keong Chong +1 more | 2022-11-29 |
| 11145651 | Transistor gate arrangement to modify driver signal characteristics | Yew Keong Chong, Sriram Thyagarajan, Damayanti Datta | 2021-10-12 |
| 10861575 | Memory with a controllable I/O functional unit | Rajiv Kumar Sisodia, Renu Rawat, Paul Darren Hoxey, Vikash, Sanjay Mangal +1 more | 2020-12-08 |
| 10741227 | Clock generating circuitry | Peixuan Tan, Andy Wangkun Chen | 2020-08-11 |
| 10665591 | Transistor gate arrangement to modify driver signal characteristics | Yew Keong Chong, Sriram Thyagarajan, Damayanti Datta | 2020-05-26 |
| 10460822 | Memory with a controllable I/O functional unit | Rajiv Kumar Sisodia, Renu Rawat, Paul Darren Hoxey, Vikash, Sanjay Mangal +1 more | 2019-10-29 |