Issued Patents All Time
Showing 25 most recent of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11588477 | Pulse stretcher circuitry | Shri Sagar Dwivedi, Fakhruddin Ali Bohra, Lalit Gupta, Yew Keong Chong | 2023-02-21 |
| 11288432 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Andy Wangkun Chen, Yew Keong Chong, Tom Shore, Marlin Wayne Frederick, Jr., Sriram Thyagarajan | 2022-03-29 |
| 10873324 | Pulse stretcher circuitry | Shri Sagar Dwivedi, Fakhruddin Ali Bohra, Lalit Gupta, Yew Keong Chong | 2020-12-22 |
| 10796053 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Paul Christopher de Dood, Marlin Wayne Frederick, Jr., Jerry C. Wang, Brian Tracy Cline, Xiaoqing Xu +6 more | 2020-10-06 |
| 10083269 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Paul Christopher de Dood, Marlin Wayne Frederick, Jr., Jerry C. Wang, Brian Lee, Brian Tracy Cline +12 more | 2018-09-25 |
| 10049709 | Port modes for use with memory | Fakhruddin Ali Bohra, George McNeil Lattimore | 2018-08-14 |
| 10020031 | Location-based optimization for memory systems | Yew Keong Chong, Andy Wangkun Chen, Sriram Thyagarajan, James Dennis Dodrill | 2018-07-10 |
| 9741410 | Memory circuitry using write assist voltage boost | Andy Wangkun Chen, Yew Keong Chong, Bo Zheng, George McNeil Lattimore | 2017-08-22 |
| 9721624 | Memory with multiple write ports | Fakhruddin Ali Bohra, Mudit Bhargava, Andy Wangkun Chen, Yew Keong Chong | 2017-08-01 |
| 9620200 | Retention voltages for integrated circuits | Sanjay Mangal, Martin Jay Kinkade, Rahul Mathur, Bal S. Sandhu, George McNeil Lattimore | 2017-04-11 |
| 9600179 | Access suppression in a memory device | Yew Keong Chong, Michael Filippo, Andy Wangkun Chen, Sriram Thyagarajan | 2017-03-21 |
| 9542986 | Low power input gating | Andy Wangkun Chen, Yew Keong Chong | 2017-01-10 |
| 9171634 | Memory device and method of controlling leakage current within such a memory device | Bo Zheng, Fakhruddin Ali Bohra | 2015-10-27 |
| 9142266 | Memory circuitry using write assist voltage boost | Andy Wangkun Chen, Yew Keong Chong, Bo Zheng, George McNeil Lattimore | 2015-09-22 |
| 9111596 | Memory access control in a memory device | Sriram Thyagarajan, Yew Keong Chong, Wang-Kun Chen | 2015-08-18 |
| 9069652 | Integrated level shifting latch circuit and method of operation of such a latch circuit | Bo Zheng, Frank Guo | 2015-06-30 |
| 8971133 | Memory device and method of operation of such a memory device | Bo Zheng, Jungtae Kwon, Yew Keong Chong | 2015-03-03 |
| 8963609 | Combinatorial circuit and method of operation of such a combinatorial circuit | Srinivasan Srinath, Fakhruddin Ali Bohra | 2015-02-24 |
| 8947968 | Memory having power saving mode | Wang-Kun Chen, Yew Keong Chong, Sriram Thyagarajan | 2015-02-03 |
| 8848412 | Ternary content addressable memory | Yew Keong Chong, Wang-Kun Chen | 2014-09-30 |
| 8645893 | Method of generating a layout of an integrated circuit comprising both standard cells and at least one memory instance | Martin Jay Kinkade, Marlin Wayne Frederick, Jr. | 2014-02-04 |
| 8582340 | Word line and power conductor within a metal layer of a memory cell | Yew Keong Chong | 2013-11-12 |
| 8582389 | Write assist in a dual write line semiconductor memory | Hemangi Umakant Gajjewar, Sachin Satish Idgunji | 2013-11-12 |
| 8479033 | Power supply detection circuitry and method | Hemangi Umakant Gajjewar | 2013-07-02 |
| 8456199 | Reducing current leakage in a semiconductor device | Hemangi Umakant Gajjewar | 2013-06-04 |