| 12230317 |
Column multiplexer circuitry |
Lalit Gupta, Shri Sagar Dwivedi, Vidit Babbar |
2025-02-18 |
| 12159664 |
Concurrent memory access operations |
Lalit Gupta, Bo Zheng, Nimish Sharma, Nicolaas Klarinus Johannes Van Winkelhoff, El Mehdi Boujamaa |
2024-12-03 |
| 11776591 |
Concurrent access techniques utilizing wordlines with the same row address in single port memory |
Lalit Gupta, Bo Zheng, El Mehdi Boujamaa |
2023-10-03 |
| 11763880 |
Column multiplexer circuitry |
Lalit Gupta, Shri Sagar Dwivedi, Vidit Babbar |
2023-09-19 |
| 11742001 |
Configurable multiplexing circuitry |
Lalit Gupta, Shri Sagar Dwivedi |
2023-08-29 |
| 11588477 |
Pulse stretcher circuitry |
Shri Sagar Dwivedi, Lalit Gupta, Yew Keong Chong, Gus Yeung |
2023-02-21 |
| 11386937 |
System device and method for providing single port memory access in bitcell array by tracking dummy wordline |
Lalit Gupta, Nicolaas Klarinus Johannes Van Winkelhoff, Bo Zheng, El Mehdi Boujamaa |
2022-07-12 |
| 11222670 |
Circuit architecture to derive higher mux from lower mux design |
Lalit Gupta, Nicolaas Klarinus Johannes Van Winkelhoff, El Mehdi Boujamaa, Bo Zheng, Cyrille Dray +2 more |
2022-01-11 |
| 11004503 |
Write assist circuitry |
Lalit Gupta, El Mehdi Boujamaa, Nicolaas Klarinus Johannes Van Winkelhoff, Bo Zheng, Nimish Sharma +1 more |
2021-05-11 |
| 10943670 |
Dummy wordline design techniques |
Lalit Gupta, Shri Sagar Dwivedi, Gaurav Rattan Singla |
2021-03-09 |
| 10878892 |
Integrated circuit using discharging circuitries for bit lines |
Lalit Gupta, Jitendra Dasani, Vivek Nautiyal, Shri Sagar Dwivedi |
2020-12-29 |
| 10873324 |
Pulse stretcher circuitry |
Shri Sagar Dwivedi, Lalit Gupta, Yew Keong Chong, Gus Yeung |
2020-12-22 |
| 10839861 |
Routing structures for memory applications |
Vivek Nautiyal, Satinderjit Singh, Abhishek B. Akkur, Shri Sagar Dwivedi, Jungtae Kwon +2 more |
2020-11-17 |
| 10755774 |
Coupling compensation circuitry |
Vivek Nautiyal, Lalit Gupta, Shri Sagar Dwivedi |
2020-08-25 |
| 10748583 |
Dummy bitline circuitry |
Lalit Gupta, Jitendra Dasani, Vivek Nautiyal, Shri Sagar Dwivedi |
2020-08-18 |
| 10734065 |
Providing a discharge boundary using bitline discharge control circuitry for an integrated circuit |
Rajiv Kumar Sisodia, Navin Agarwal, Shri Sagar Dwivedi, Jitendra Dasani, Lalit Gupta +1 more |
2020-08-04 |
| 10672459 |
Transition coupling circuitry for memory applications |
Yicong Li, Andy Wangkun Chen, Sharryl Renee Dettmer, Lalit Gupta, Jitendra Dasani +2 more |
2020-06-02 |
| 10622038 |
High-speed memory architecture |
Lalit Gupta, Jitendra Dasani, Shri Sagar Dwivedi, Vivek Nautiyal, Gaurav Rattan Singla |
2020-04-14 |
| 10600477 |
Coupling compensation circuitry |
Vivek Nautiyal, Lalit Gupta, Shri Sagar Dwivedi |
2020-03-24 |
| 10269416 |
Dummy wordline tracking circuitry |
Lalit Gupta, Jitendra Dasani, Vivek Nautiyal |
2019-04-23 |
| 10217496 |
Bitline write assist circuitry |
Vivek Nautiyal, Jitendra Dasani, Satinderjit Singh, Shri Sagar Dwivedi, Bo Zheng |
2019-02-26 |
| 10147482 |
Skewed corner tracking for memory write operations |
Jitendra Dasani, Vivek Nautiyal, Shri Sagar Dwivedi |
2018-12-04 |
| 10074410 |
Integrated circuit using shaping and timing circuitries |
Vivek Nautiyal, Jitendra Dasani, Satinderjit Singh, Shri Sagar Dwivedi |
2018-09-11 |
| 10056121 |
Integrated circuit using topology configurations |
Mahmood Khayatzadeh, Massimo Alioto, David Theodore Blaauw, Dennis Sylvester |
2018-08-21 |
| 10049709 |
Port modes for use with memory |
Gus Yeung, George McNeil Lattimore |
2018-08-14 |
