| 11232833 |
Dummy bitline circuitry |
Abhishek B. Akkur, Shri Sagar Dwivedi, Vivek Nautiyal, Satinderjit Singh, Vasimraja Bhavikatti |
2022-01-25 |
|
| 11043262 |
Write assist circuitry |
Arjunesh Namboothiri Madhavan, Akash Bangalore Srinivasa, Sujit Kumar Rout, Vikash, Gaurav Rattan Singla +3 more |
2021-06-22 |
|
| 10878892 |
Integrated circuit using discharging circuitries for bit lines |
Lalit Gupta, Vivek Nautiyal, Shri Sagar Dwivedi, Fakhruddin Ali Bohra |
2020-12-29 |
|
| 10848186 |
Fault detection circuitry |
Vivek Asthana, Amit Chhabra |
2020-11-24 |
|
| 10839861 |
Routing structures for memory applications |
Vivek Nautiyal, Satinderjit Singh, Abhishek B. Akkur, Shri Sagar Dwivedi, Fakhruddin Ali Bohra +2 more |
2020-11-17 |
|
| 10748583 |
Dummy bitline circuitry |
Lalit Gupta, Vivek Nautiyal, Fakhruddin Ali Bohra, Shri Sagar Dwivedi |
2020-08-18 |
|
| 10734065 |
Providing a discharge boundary using bitline discharge control circuitry for an integrated circuit |
Rajiv Kumar Sisodia, Navin Agarwal, Shri Sagar Dwivedi, Fakhruddin Ali Bohra, Lalit Gupta +1 more |
2020-08-04 |
|
| 10672459 |
Transition coupling circuitry for memory applications |
Yicong Li, Andy Wangkun Chen, Sharryl Renee Dettmer, Lalit Gupta, Yeon Jun Park +2 more |
2020-06-02 |
|
| 10622038 |
High-speed memory architecture |
Lalit Gupta, Fakhruddin Ali Bohra, Shri Sagar Dwivedi, Vivek Nautiyal, Gaurav Rattan Singla |
2020-04-14 |
|
| 10425076 |
Power-on-reset circuit |
Lalit Gupta, Vivek Nautiyal, Andy Wangkun Chen, Bo Zheng, Akshay Kumar +1 more |
2019-09-24 |
|
| 10269416 |
Dummy wordline tracking circuitry |
Lalit Gupta, Vivek Nautiyal, Fakhruddin Ali Bohra |
2019-04-23 |
|
| 10217496 |
Bitline write assist circuitry |
Vivek Nautiyal, Satinderjit Singh, Shri Sagar Dwivedi, Bo Zheng, Fakhruddin Ali Bohra |
2019-02-26 |
|
| 10147482 |
Skewed corner tracking for memory write operations |
Vivek Nautiyal, Shri Sagar Dwivedi, Fakhruddin Ali Bohra |
2018-12-04 |
|
| 10074410 |
Integrated circuit using shaping and timing circuitries |
Vivek Nautiyal, Fakhruddin Ali Bohra, Satinderjit Singh, Shri Sagar Dwivedi |
2018-09-11 |
|
| 10033376 |
Power-on-reset circuit |
Lalit Gupta, Vivek Nautiyal, Andy Wangkun Chen, Bo Zheng, Akshay Kumar +1 more |
2018-07-24 |
|
| 9953701 |
SRAM architecture with bitcells of varying speed and density |
Fakhruddin Ali Bohra, Lalit Gupta, Shri Sagar Dwivedi |
2018-04-24 |
|
| 9711243 |
Redundancy schemes for memory |
Vivek Nautiyal, Fakhruddin Ali Bohra, Satinderjit Singh, Shri Sagar Dwivedi |
2017-07-18 |
|
| 9236140 |
Complementary read-only memory (ROM) cell and method for manufacturing the same |
— |
2016-01-12 |
$1,157,000 |
| 8526209 |
Complementary read-only memory (ROM) cell and method for manufacturing the same |
— |
2013-09-03 |
$3,416,000 |
| 8378711 |
Detection of single bit upset at dynamic logic due to soft error in real time |
Chirag Gulati, Rita Zappa, Stefano Corbani |
2013-02-19 |
$4,021,000 |
