Issued Patents All Time
Showing 26–50 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8355276 | Controlling voltage levels applied to access devices when accessing storage cells in a memory | Sachin Satish Idgunji, Hemangi Umakant Gajjewar | 2013-01-15 |
| 8218391 | Power control of an integrated circuit memory | Martin Jay Kinkade, Yew Keong Chong | 2012-07-10 |
| 8045401 | Supporting scan functions within memories | Yew Keong Chong, Paul Darren Hoxey, Paul Stanley Hughes, Gary Robert Waggoner | 2011-10-25 |
| 8045402 | Assisting write operations to data storage cells | — | 2011-10-25 |
| 8014226 | Integrated circuit memory with word line driving helper circuits | Amarnath Shanmugam, Yew Keong Chong, Jacek Wiatrowski | 2011-09-06 |
| 7940546 | ROM array | Sriram Thyagarajan, Andrew John Sowden | 2011-05-10 |
| 7660186 | Memory clock generator having multiple clock modes | Yew Keong Chong | 2010-02-09 |
| 7606108 | Access collision within a multiport memory | David Anthony New, Martin Jay Kinkade, David John Willingham | 2009-10-20 |
| 7489178 | Level shifter for use between voltage domains | — | 2009-02-10 |
| 6915385 | Apparatus for unaligned cache reads and methods therefor | Terry Lee Leasure, George McNeil Lattimore, Robert A. Ross | 2005-07-05 |
| 6737888 | Method for skipping a latch in timing-sensitive dynamic circuits of a multi-clocked system with unspecific underlap requirement | George McNeil Lattimore, Donald George Mikan, Jr., Jose Angel Paredes | 2004-05-18 |
| 6338128 | System and method for invalidating an entry in a translation unit | Albert Chang, Edward John Silha, Larry Edward Thatcher | 2002-01-08 |
| 6243776 | Selectable differential or single-ended mode bus | George McNeil Lattimore, Robert J. Reese | 2001-06-05 |
| 6195280 | Memory system having a unidirectional bus and method for communicating therewith | George McNeil Lattimore, Younes Lotfi, Robert A. Ross | 2001-02-27 |
| 6191620 | Sense amplifier/comparator circuit and data comparison method | George McNeil Lattimore, Terry Lee Leasure, Younes Lotfi, Robert A. Ross | 2001-02-20 |
| 6157216 | Circuit driver on SOI for merged logic and memory circuits | George McNeil Lattimore, Donald George Mikan, Jr., Binta M. Patel | 2000-12-05 |
| 6134164 | Sensing circuit for a memory cell array | George McNeil Lattimore | 2000-10-17 |
| 6108255 | Conditional restore for RAM based on feedback from a RAM cell to precharge circuitry | Michael Kevin Ciraula, George McNeil Lattimore | 2000-08-22 |
| 6081458 | Memory system having a unidirectional bus and method for communicating therewith | George McNeil Lattimore, Younes Lotfi, Robert A. Ross | 2000-06-27 |
| 6064616 | Conditional restore for SRAM | Michael Kevin Ciraula, George McNeil Lattimore | 2000-05-16 |
| 6058065 | Memory in a data processing system having improved performance and method therefor | George McNeil Lattimore, Terry Lee Leasure, Robert A. Ross | 2000-05-02 |
| 6046930 | Memory array and method for writing data to memory | Michael Kevin Ciraula, George McNeil Lattimore, Terry Lee Leasure | 2000-04-04 |
| 6025741 | Conditional restore for execution unit | Michael Kevin Ciraula, George McNeil Lattimore | 2000-02-15 |
| 6002626 | Method and apparatus for memory cell array boost amplifier | George McNeil Lattimore, Robert A. Ross | 1999-12-14 |
| 5982692 | Bit line boost amplifier | George McNeil Lattimore, Robert A. Ross | 1999-11-09 |