Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424292 | Masking techniques for memory applications | Vivek Asthana, Yew Keong Chong, Jean-Christophe Vial | 2025-09-23 |
| 11837543 | Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network | Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong, Sony, Ayush Kulshrestha | 2023-12-05 |
| 11475200 | Circuit layout techniques | Yulin Shi, Vincent Philippe Schuppe | 2022-10-18 |
| 11443777 | Backside power rail architecture | Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong, Sony, Ayush Kulshrestha | 2022-09-13 |
| 11380384 | Buried power rail structure for providing multi-domain power supply for memory device | Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong, Sony, Ayush Kulshrestha | 2022-07-05 |
| 11328750 | Bitcell architecture with buried ground rail | Andy Wangkun Chen, Yew Keong Chong, Sony | 2022-05-10 |
| 11271567 | Buried metal technique for critical signal nets | Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong, Sony, Ayush Kulshrestha | 2022-03-08 |
| 11170843 | Bitcell with multiple read bitlines | Andy Wangkun Chen, Yew Keong Chong, Sriram Thyagarajan | 2021-11-09 |
| 11068639 | Metal layout techniques | Marlin Wayne Frederick, Jr., Ronald Paxton Preston, Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong | 2021-07-20 |
| 7995366 | Homogenous cell array | Martin Ostermayr, Peter Huber | 2011-08-09 |
| 7692974 | Memory cell, memory device, device and method of accessing a memory cell | Thomas Fischer, Peter Huber, Martin Ostermayr | 2010-04-06 |