Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11568926 | Latch circuitry for memory applications | Andy Wangkun Chen, Frank David Frederick, Richard Slobodnik, Yew Keong Chong | 2023-01-31 |
| 10847211 | Latch circuitry for memory applications | Andy Wangkun Chen, Frank David Frederick, Richard Slobodnik, Yew Keong Chong | 2020-11-24 |
| 10222418 | Scan cell for dual port memory applications | Yew Keong Chong, Richard Slobodnik, Frank David Frederick, Kartikey Jani | 2019-03-05 |
| 9612280 | Partial scan cell | — | 2017-04-04 |
| 8468405 | Integrated circuit testing | Gerard R. Williams, III | 2013-06-18 |
| 7913131 | Scan chain cell with delay testing capability | — | 2011-03-22 |
| 7308631 | Wrapper serial scan chain functional segmentation | — | 2007-12-11 |
| 7085978 | Validating test signal connections within an integrated circuit | Peter Logan Harrod, Raul A. Garibay, Jr. | 2006-08-01 |
| 7080299 | Resetting latch circuits within a functional circuit and a test wrapper circuit | — | 2006-07-18 |
| 6999900 | Testing memory access signal connections | Frank David Frederick | 2006-02-14 |
| 6598192 | Method and apparatus for testing an integrated circuit | Donald L. Tietjen, Alfred L. Crouch, Kristen L. Mason | 2003-07-22 |