Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11568926 | Latch circuitry for memory applications | Andy Wangkun Chen, Teresa Louise McLaurin, Richard Slobodnik, Yew Keong Chong | 2023-01-31 |
| 11315654 | Memory testing techniques | Andy Wangkun Chen, Yannis Jallamion-Grive, Cyrille Dray | 2022-04-26 |
| 11280832 | Memory embedded full scan for latent defects | Andy Wangkun Chen, Richard Slobodnik | 2022-03-22 |
| 10847211 | Latch circuitry for memory applications | Andy Wangkun Chen, Teresa Louise McLaurin, Richard Slobodnik, Yew Keong Chong | 2020-11-24 |
| 10222418 | Scan cell for dual port memory applications | Yew Keong Chong, Teresa Louise McLaurin, Richard Slobodnik, Kartikey Jani | 2019-03-05 |
| 7434119 | Method and apparatus for memory self testing | Richard Slobodnik | 2008-10-07 |
| 7330994 | Clock control of a multiple clock domain data processor | — | 2008-02-12 |
| 7308623 | Integrated circuit and method for testing memory on the integrated circuit | Richard Slobodnik, Paul Stanley Hughes, Brandon Michael Backlund | 2007-12-11 |
| 6999900 | Testing memory access signal connections | Teresa Louise McLaurin | 2006-02-14 |
| 6877123 | Scan clock circuit and method therefor | Thomas K. Johnston | 2005-04-05 |