| 11468941 |
Memory architecture with pulsed-bias power |
Akash Bangalore Srinivasa, Penaka Phani Goberu, Yew Keong Chong |
2022-10-11 |
| 11468945 |
3D storage architecture with tier-specific controls |
Rahul Mathur, Mudit Bhargava, Joel Thornton Irby |
2022-10-11 |
| 11443777 |
Backside power rail architecture |
Sriram Thyagarajan, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-09-13 |
| 11404096 |
Wordline decoder circuitry |
Jungtae Kwon, Nicolaas Klarinus Johannes Van Winkelhoff |
2022-08-02 |
| 11380384 |
Buried power rail structure for providing multi-domain power supply for memory device |
Sriram Thyagarajan, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-07-05 |
| 11328750 |
Bitcell architecture with buried ground rail |
Ettore Amirante, Yew Keong Chong, Sony |
2022-05-10 |
| 11322197 |
Power-gating techniques with buried metal |
Rajiv Kumar Sisodia, Ayush Kulshrestha, Sony, Sriram Thyagarajan, Yew Keong Chong |
2022-05-03 |
| 11315628 |
Techniques for powering memory |
Rajiv Kumar Sisodia, Ayush Kulshrestha, Sony |
2022-04-26 |
| 11315654 |
Memory testing techniques |
Yannis Jallamion-Grive, Cyrille Dray, Frank David Frederick |
2022-04-26 |
| 11288432 |
Computer implemented system and method for generating a layout of a cell defining a circuit component |
Yew Keong Chong, Tom Shore, Gus Yeung, Marlin Wayne Frederick, Jr., Sriram Thyagarajan |
2022-03-29 |
| 11280832 |
Memory embedded full scan for latent defects |
Frank David Frederick, Richard Slobodnik |
2022-03-22 |
| 11271567 |
Buried metal technique for critical signal nets |
Sriram Thyagarajan, Yew Keong Chong, Sony, Ettore Amirante, Ayush Kulshrestha |
2022-03-08 |
| 11211111 |
CAM device with 3D CAM cells |
Rahul Mathur, Mudit Bhargava, Supreet Jeloka |
2021-12-28 |
| 11200922 |
Memory multiplexing techniques |
Sriram Thyagarajan, Yew Keong Chong, Munish Kumar |
2021-12-14 |
| 11170843 |
Bitcell with multiple read bitlines |
Yew Keong Chong, Sriram Thyagarajan, Ettore Amirante |
2021-11-09 |
| 11133043 |
Configurable control of integrated circuits |
Yew Keong Chong, Sriram Thyagarajan |
2021-09-28 |
| 11087834 |
Read and write techniques |
Yew Keong Chong, Sriram Thyagarajan, Pratik Ghanshambhai Satasia |
2021-08-10 |
| 11068639 |
Metal layout techniques |
Marlin Wayne Frederick, Jr., Ettore Amirante, Ronald Paxton Preston, Sriram Thyagarajan, Yew Keong Chong |
2021-07-20 |
| 11056183 |
Multi-port memory circuitry |
Yew Keong Chong, Sriram Thyagarajan |
2021-07-06 |
| 11017142 |
Methods and apparatuses of configurable integrated circuits |
Shruti Aggarwal, Mohit Chanana, Hsin-Yu Chen, Kyung-Woo Kim |
2021-05-25 |
| 11011222 |
Memory structure with bitline strapping |
Marlin Wayne Frederick, Jr., Ronald Paxton Preston, Yew Keong Chong |
2021-05-18 |
| 11005461 |
Level shift latch circuitry |
Sai Sriharsha Manapragada, Yicong Li, Yew Keong Chong, Bikas Maiti, Sanjay Mangal +1 more |
2021-05-11 |
| 10984863 |
Error detection and correction circuitry |
Mohammed Saif Kunjatur Sheikh, Vikash |
2021-04-20 |
| 10978141 |
Configurable integrated circuits |
Yew Keong Chong, Sriram Thyagarajan, Vivek Asthana, Munish Kumar |
2021-04-13 |
| 10937481 |
Polarity swapping circuitry |
Peixuan Tan |
2021-03-02 |