| 12132620 |
System and method for artificial intelligence assisted service catalogue generation for network service provisioning |
Vishwanath Taware, Allahbaksh Mohammedali Asadullah, Ashay Kharpate, Gaurav Saxena, Praveen Santhakumari +1 more |
2024-10-29 |
$39,234,000 |
| 11475944 |
Read assist circuitry for memory applications |
Rahul Mathur, Vivek Asthana, Nikhil Kaushik, Rachit Ahuja, Bikas Maiti +1 more |
2022-10-18 |
|
| 10861534 |
Memory cell write assist in response to voltage tracking of a replica circuit |
Ishan Khera, Nimish Sharma, Ishita Satishchandra Desai, Vikash Kumar, Nitesh Gautam |
2020-12-08 |
|
| 10854280 |
Read assist circuitry for memory applications |
Abhairaj Singh, Vivek Asthana, Monu Rathore, Nikhil Kaushik, Rachit Ahuja +3 more |
2020-12-01 |
|
| 10515684 |
Read assist circuitry for memory applications |
Mohit Chanana, Shruti Aggarwal |
2019-12-24 |
|
| 10229731 |
Method, system and circuit for staggered boost injection |
Akshay Kumar, Mohit Chanana, Piyush Jain |
2019-03-12 |
|
| 10199094 |
Write operation scheme for SRAM |
Saikat Kumar Banik, Lokesh Kumar Saini, Vivek Asthana |
2019-02-05 |
|
| 10199092 |
Boost circuit for memory |
Mohit Chanana |
2019-02-05 |
|
| 9997217 |
Write assist circuitry |
Munish Kumar, Nitin Jindal, Rahul Mathur, Shruti Aggarwal, Bikas Maiti +1 more |
2018-06-12 |
|
| 9424900 |
Area-efficient process-and-temperature-adaptive self-time scheme for performance and power improvement |
Dharmendra Kumar Rai, Biswa Bhusan Sahoo, Vipin Aryamvalli |
2016-08-23 |
$45,612,000 |
| 9384790 |
Memory device with separately controlled sense amplifiers |
Manish Trivedi, Setti Shanmukheswara Rao |
2016-07-05 |
$18,323,000 |
| 9251889 |
Area-efficient, high-speed, dynamic-circuit-based sensing scheme for dual-rail SRAM memories |
Dharmendra Kumar Rai, Sumith Kaippalathingal Soman |
2016-02-02 |
$36,192,000 |
| 9177620 |
Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality |
Shetti Shanmukheshwara Rao |
2015-11-03 |
|
| 8773942 |
Segmented memory having power-saving mode |
Richard J. Stephani, Gordon W. Priebe |
2014-07-08 |
|
| 8730750 |
Memory device with control circuitry for generating a reset signal in read and write modes of operation |
Manish Trivedi, Setti Shanmukheswara Rao |
2014-05-20 |
|
| 8724421 |
Dual rail power supply scheme for memories |
Donald Albert Evans, Rasoju Veerabadra Chary, Setti Shanmukheswara Rao |
2014-05-13 |
|
| 8699281 |
Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality |
Shetti Shanmukheshwara Rao |
2014-04-15 |
$13,632,000 |
| 8462562 |
Memory device with area efficient power gating circuitry |
Donald Albert Evans, Dennis E. Dudeck, Richard J. Stephani, Ronald James Wozniak, Dharmendra Kumar Rai +2 more |
2013-06-11 |
|
| 8427886 |
Memory device with trimmable power gating capabilities |
Venkateswara Reddy Konudula, Sathisha Nanjunde Gowda |
2013-04-23 |
|
| 8259509 |
Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality |
Shetti Shanmukheshwara Rao |
2012-09-04 |
$3,763,000 |
| 7826241 |
Semiconductor memory device that can relieve defective address |
Krishman S. Rengarajan, Sahadevan A. Kumaran, Sanjay Kumar Mishra |
2010-11-02 |
$2,835,000 |
| 7619916 |
8-T SRAM cell circuit, system and method for low leakage current |
— |
2009-11-17 |
$7,514,000 |
| 7545180 |
Sense amplifier providing low capacitance with reduced resolution time |
Mudit Bhargava, Shishir Kumar |
2009-06-09 |
$7,513,000 |
