| 12506117 |
Wafer level integration of passive devices |
— |
2025-12-23 |
|
| 12469765 |
Thermally enhanced chip-on-wafer or wafer-on-wafer bonding |
Jinshu LU, Kui Hu, Sanjay Dabral |
2025-11-11 |
|
| 12456692 |
Microelectronic package RDL patterns to reduce stress in RDLs across components |
Wei-Kuo CHEN, Yi Xu, Jiayun Zhao |
2025-10-28 |
|
| 12451436 |
Interconnecting a plurality of dies having spare input/output circuit |
Sanjay Dabral |
2025-10-21 |
|
| 12368137 |
High bandwidth die to die interconnect with package area reduction |
Chonghua Zhong, Kunzhong Hu |
2025-07-22 |
|
| 12322730 |
Wafer reconstitution and die-stitching |
Sanjay Dabral, Kwan-Yu Lai, Kunzhong Hu, Vidhya Ramachandran |
2025-06-03 |
|
| 12283549 |
High density interconnection using fanout interposer chiplet |
Chonghua Zhong, Kunzhong Hu |
2025-04-22 |
|
| 12261132 |
Structure and method for sealing a silicon IC |
Vidhya Ramachandran, Sanjay Dabral, SivaChandra Jangam, Kunzhong Hu |
2025-03-25 |
|
| 12249599 |
Multiple chip module trenched lid and low coefficient of thermal expansion stiffener ring |
Wei Chen, Jie Zhao, Po-Hao Chang, Hsien-Che Lin, Ying-Chieh Ke +1 more |
2025-03-11 |
|
| 12159835 |
High density 3D interconnect configuration |
Sanjay Dabral, Zhitao Cao, Kunzhong Hu |
2024-12-03 |
$369,762,000 |
| 12134870 |
Fluctuation zone state slope protection system that responds to hydrological changes |
Rong Li |
2024-11-05 |
|
| 12119275 |
Recessed lid and ring designs and lid local peripheral reinforcement designs |
Wei Chen, Jie Zhao |
2024-10-15 |
$249,534,000 |
| 12087689 |
Selectable monolithic or external scalable die-to-die interconnection system methodology |
Sanjay Dabral, Jung-Cheng Yeh, Kunzhong Hu, Raymundo M. Camenforte, Thomas Hoffmann |
2024-09-10 |
$233,602,000 |
| 12074077 |
Flexible package architecture concept in fanout |
Karthik Shanmugam, Flynn Carson, Raymundo M. Camenforte, Menglu Li |
2024-08-27 |
$283,265,000 |
| 12068324 |
Multi-die fine grain integrated voltage regulation |
Jared L. Zerbe, Emerson S. Fang, Shawn Searles |
2024-08-20 |
$206,773,000 |
| 12033982 |
Fully interconnected heterogeneous multi-layer reconstructed silicon device |
— |
2024-07-09 |
$250,204,000 |
| 12021035 |
Interconnecting dies by stitch routing |
Sanjay Dabral |
2024-06-25 |
$209,077,000 |
| 11967528 |
Structure and method for fabricating a computing system with an integrated voltage regulator module |
Vidhya Ramachandran, Chonghua Zhong, Kunzhong Hu, Shawn Searles, Joseph T. DiBene, II +1 more |
2024-04-23 |
$223,464,000 |
| 11908819 |
Semiconductor packaging substrate fine pitch metal bump and reinforcement structures |
Jun Chung Hsu, Chih-Ming Chung, Yifan Kao, Young Doo Jeon, Taegui Kim |
2024-02-20 |
$143,830,000 |
| 11862557 |
Selectable monolithic or external scalable die-to-die interconnection system methodology |
Sanjay Dabral, Jung-Cheng Yeh, Kunzhong Hu, Raymundo M. Camenforte, Thomas Hoffmann |
2024-01-02 |
$111,466,000 |
| 11824015 |
Structure and method for sealing a silicon IC |
Vidhya Ramachandran, Sanjay Dabral, SivaChandra Jangam, Kunzhong Hu |
2023-11-21 |
$128,924,000 |
| 11749631 |
Electronic package including a hybrid thermal interface material and low temperature solder patterns to improve package warpage and reliability |
Wei Chen, Kunzhong Hu |
2023-09-05 |
$187,157,000 |
| 11735526 |
High density 3D interconnect configuration |
Sanjay Dabral, Zhitao Cao, Kunzhong Hu |
2023-08-22 |
$159,607,000 |
| 11735567 |
Wafer reconstitution and die-stitching |
Sanjay Dabral, Kwan-Yu Lai, Kunzhong Hu, Vidhya Ramachandran |
2023-08-22 |
$159,607,000 |
| 11728266 |
Die stitching and harvesting of arrayed structures |
Sanjay Dabral, Kunzhong Hu, Raymundo M. Camenforte |
2023-08-15 |
$190,320,000 |
