Issued Patents All Time
Showing 151–175 of 251 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6596623 | Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers | Wenge Yang | 2003-07-22 |
| 6593748 | Process integration of electrical thickness measurement of gate oxide and tunnel oxides by corona discharge technique | Arvind Halliyal, Bhanwar Singh | 2003-07-15 |
| 6594024 | Monitor CMP process using scatterometry | Bhanwar Singh, Khoi A. Phan, Bharath Rangarajan, Carmen Morales | 2003-07-15 |
| 6592932 | Nozzle arm movement for resist development | Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur | 2003-07-15 |
| 6591658 | Carbon nanotubes as linewidth standards for SEM & AFM | Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Michael K. Templeton | 2003-07-15 |
| 6589711 | Dual inlaid process using a bilayer resist | Christopher F. Lyons, Marina V. Plat, Bhanwar Singh | 2003-07-08 |
| 6589804 | Oxide/nitride or oxide/nitride/oxide thickness measurement using scatterometry | Arvind Halliyal, Bhanwar Singh | 2003-07-08 |
| 6583871 | System and method to measure closed area defects | Bharath Rangarajan, Bhanwar Singh, Khoi A. Phan | 2003-06-24 |
| 6579651 | Modification of mask layout data to improve mask fidelity | Khoi A. Phan, Bhanwar Singh, Bharath Rangarajan | 2003-06-17 |
| 6579733 | Using scatterometry to measure resist thickness and control implant | Bharath Rangarajan, Bhanwar Singh | 2003-06-17 |
| 6573480 | Use of thermal flow to remove side lobes | Bharath Rangarajan, Michael K. Templeton | 2003-06-03 |
| 6572252 | System and method for illuminating a semiconductor processing system | Bharath Rangarajan, Bhanwar Singh, Khoi A. Phan, Bryan K. Choo | 2003-06-03 |
| 6566214 | Method of making a semiconductor device by annealing a metal layer to form metal silicide and using the metal silicide as a hard mask to pattern a polysilicon layer | Christopher F. Lyons, Scott A. Bell, Todd P. Lukanc, Marina V. Plat | 2003-05-20 |
| 6561706 | Critical dimension monitoring from latent image | Bhanwar Singh, Michael K. Templeton, Bharath Rangarajan | 2003-05-13 |
| 6563221 | Connection structures for integrated circuits and processes for their formation | Scott A. Bell, Todd P. Lukanc, Christopher F. Lyons, Marina V. Plat | 2003-05-13 |
| 6562248 | Active control of phase shift mask etching process | Bhanwar Singh, Michael K. Templeton | 2003-05-13 |
| 6562185 | Wafer based temperature sensors for characterizing chemical mechanical polishing processes | Steven C. Avanzino, Bhanwar Singh, Bharath Rangarajan | 2003-05-13 |
| 6558965 | Measuring BARC thickness using scatterometry | Bhanwar Singh, Christopher F. Lyons, Marina V. Plat | 2003-05-06 |
| 6545753 | Using scatterometry for etch end points for dual damascene process | Bhanwar Singh, Michael K. Templeton | 2003-04-08 |
| 6541360 | Bi-layer trim etch process to form integrated circuit gate structures | Marina V. Plat, Scott A. Bell, Christopher F. Lyons, Bhanwar Singh | 2003-04-01 |
| 6541184 | Nozzle arm movement for resist development | Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur | 2003-04-01 |
| 6534418 | Use of silicon containing imaging layer to define sub-resolution gate structures | Marina V. Plat, Scott A. Bell, Christopher F. Lyons, Bhanwar Singh | 2003-03-18 |
| 6534243 | Chemical feature doubling process | Michael K. Templeton, Bharath Rangarajan, Kathleen R. Early, Ursula Q. Quinto | 2003-03-18 |
| 6524947 | Slotted trench dual inlaid structure and method of forming thereof | Todd P. Lukanc, Fei Wang | 2003-02-25 |
| 6524944 | Low k ILD process by removable ILD | Bharath Rangarajan, Michael K. Templeton | 2003-02-25 |