Issued Patents All Time
Showing 26–50 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11011495 | Multiple-die integrated circuit with integrated voltage regulator | David Hugh McIntyre, Rahul Agarwal | 2021-05-18 |
| 11011466 | Integrated circuit package with integrated voltage regulator | Rahul Agarwal, Chia-Hao Cheng | 2021-05-18 |
| 11002572 | Optical encoder with direction-dependent optical properties comprising a spindle having an array of surface features defining a concave contour along a first direction and a convex contour along a second direction | Paisith P. Boonsom, Serhan O. Isikman, Richard Ruh, Prashanth S. Holenarsipur, Colin M. Ely +5 more | 2021-05-11 |
| 10943880 | Semiconductor chip with reduced pitch conductive pillars | Priyal Shah, Lei Fu | 2021-03-09 |
| 10937755 | Bond pads for low temperature hybrid bonding | Priyal Shah | 2021-03-02 |
| 10930621 | Die stacking for multi-tier 3D integration | Rahul Agarwal | 2021-02-23 |
| 10923430 | High density cross link die with polymer routing layer | Chun-Hung Lin, Rahul Agarwal, Fei Guo | 2021-02-16 |
| 10903168 | Multi-RDL structure packages and methods of fabricating the same | Lei Fu, Farshad Ghahghahi | 2021-01-26 |
| 10867978 | Integrated circuit module with integrated discrete devices | Rahul Agarwal | 2020-12-15 |
| 10825692 | Semiconductor chip gettering | Rahul Agarwal, Ivor G. Barber, Venkatachalam Valliappan, Yuen Ting Cheng, Guan Sin Chok | 2020-11-03 |
| 10727204 | Die stacking for multi-tier 3D integration | Rahul Agarwal | 2020-07-28 |
| 10714462 | Multi-chip package with offset 3D structure | Rahul Agarwal, Gabriel H. Loh | 2020-07-14 |
| 10672712 | Multi-RDL structure packages and methods of fabricating the same | Lei Fu, Farshad Ghahghahi | 2020-06-02 |
| 10655988 | Watch with rotatable optical encoder having a spindle defining an array of alternating regions extending along an axial direction parallel to the axis of a shaft | Paisith P. Boonsom, Serhan O. Isikman, Richard Ruh, Prashanth S. Holenarsipur, Colin M. Ely +5 more | 2020-05-19 |
| 10593628 | Molded die last chip combination | Rahul Agarwal | 2020-03-17 |
| 10593620 | Fan-out package with multi-layer redistribution layer structure | Rahul Agarwal, Priyal Shah | 2020-03-17 |
| 10573630 | Offset-aligned three-dimensional integrated circuit | Brett P. Wilkerson, Rahul Agarwal, Dmitri Yudanov | 2020-02-25 |
| 10529693 | 3D stacked dies with disparate interconnect footprints | Rahul Agarwal | 2020-01-07 |
| 10510721 | Molded chip combination | Lei Fu, Ivor G. Barber, Chia-Ken Leong, Rahul Agarwal | 2019-12-17 |
| 10431517 | Arrangement and thermal management of 3D stacked dies | John Wuu, Samuel D. Naffziger, Patrick J. Shyvers, Kaushik Mysore, Brett P. Wilkerson | 2019-10-01 |
| 10312221 | Stacked dies and dummy components for improved thermal performance | Rahul Agarwal, Kaushik Mysore Srinivasa Setty, Brett P. Wilkerson | 2019-06-04 |
| 10145711 | Optical encoder with direction-dependent optical properties having an optically anisotropic region to produce a first and a second light distribution | Paisith P. Boonsom, Serhan O. Isikman, Richard Ruh, Prashanth S. Holenarsipur, Colin M. Ely +5 more | 2018-12-04 |
| 9883822 | Biometric sensor chip having distributed sensor and control circuitry | Jun Zhai | 2018-02-06 |
| 9850127 | Method and system for CMOS based MEMS bump stop contact damage prevention | Richard Yeh, Henry H. Yang | 2017-12-26 |
| 9751756 | Method and system for CMOS based MEMS bump stop contact damage prevention | Richard Yeh, Henry H. Yang | 2017-09-05 |