MP

Marina V. Plat

AM AMD: 64 patents #80 of 9,279Top 1%
CL Clariant Finance (Bvi) Limited: 1 patents #235 of 535Top 45%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
SL Spansion Llc.: 1 patents #435 of 769Top 60%
📍 Hyde Park, NY: #1 of 223 inventorsTop 1%
🗺 New York: #1,127 of 115,490 inventorsTop 1%
Overall (All Time): #31,276 of 4,157,543Top 1%
68
Patents All Time

Issued Patents All Time

Showing 26–50 of 68 patents

Patent #TitleCo-InventorsDate
6773998 Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning Philip A. Fisher, Chih-Yuh Yang, Christopher F. Lyons, Scott A. Bell, Douglas J. Bonser +2 more 2004-08-10
6764949 Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication Douglas J. Bonser, Chih-Yuh Yang, Scott A. Bell, Darin A. Chan, Philip A. Fisher +6 more 2004-07-20
6764947 Method for reducing gate line deformation and reducing gate line widths in semiconductor devices Darin A. Chan, Douglas J. Bonser, Marilyn I. Wright, Chih-Yuh Yang, Lu You +2 more 2004-07-20
6753266 Method of enhancing gate patterning properties with reflective hard mask Todd P. Lukanc, Scott A. Bell, Christopher F. Lyons, Ramkumar Subramanian 2004-06-22
6737222 Dual damascene process utilizing a bi-layer imaging layer Ramkumar Subramanian, Christopher F. Lyons, Scott A. Bell 2004-05-18
6689682 Multilayer anti-reflective coating for semiconductor lithography Robert B. Ogle, Tuan Pham 2004-02-10
6689541 Process for forming a photoresist mask Scott A. Bell, Todd P. Lukanc, Christopher F. Lyons, Ramkumar Subramanian 2004-02-10
6660645 Process for etching an organic dielectric using a silyated photoresist mask Scott A. Bell, Todd P. Lukanc, Christopher F. Lyons, Ramkumar Subramanian 2003-12-09
6635409 Method of strengthening photoresist to prevent pattern collapse Christopher F. Lyons, Scott A. Bell, Todd P. Lukanc 2003-10-21
6606738 Analytical model for predicting the operating process window for lithographic patterning techniques based on photoresist trim technology Scott A. Bell, Amada Wilkison, Chih-Yuh Yang 2003-08-12
6605546 Dual bake for BARC fill without voids Ramkumar Subramanian, Wolfram Grundke, Bhanwar Singh, Christopher F. Lyons 2003-08-12
6589711 Dual inlaid process using a bilayer resist Ramkumar Subramanian, Christopher F. Lyons, Bhanwar Singh 2003-07-08
6586339 Silicon barrier layer to prevent resist poisoning Robert B. Ogle, Lewis Shen 2003-07-01
6566214 Method of making a semiconductor device by annealing a metal layer to form metal silicide and using the metal silicide as a hard mask to pattern a polysilicon layer Christopher F. Lyons, Ramkumar Subramanian, Scott A. Bell, Todd P. Lukanc 2003-05-20
6563221 Connection structures for integrated circuits and processes for their formation Scott A. Bell, Todd P. Lukanc, Christopher F. Lyons, Ramkumar Subramanian 2003-05-13
6558965 Measuring BARC thickness using scatterometry Bhanwar Singh, Ramkumar Subramanian, Christopher F. Lyons 2003-05-06
6548423 Multilayer anti-reflective coating process for integrated circuit fabrication Christopher F. Lyons, Scott A. Bell, Todd P. Lukanc 2003-04-15
6541360 Bi-layer trim etch process to form integrated circuit gate structures Scott A. Bell, Christopher F. Lyons, Ramkumar Subramanian, Bhanwar Singh 2003-04-01
6534418 Use of silicon containing imaging layer to define sub-resolution gate structures Scott A. Bell, Christopher F. Lyons, Ramkumar Subramanian, Bhanwar Singh 2003-03-18
6458691 Dual inlaid process using an imaging layer to protect via from poisoning Ramkumar Subramanian, Christopher F. Lyons, Bhanwar Singh 2002-10-01
6458606 Etch bias distribution across semiconductor wafer Luigi Capodieci, Scott A. Bell, Todd P. Lukanc 2002-10-01
6448164 Dark field image reversal for gate or line patterning Christopher F. Lyons, Ramkumar Subramanian, Todd P. Lukanc 2002-09-10
6423650 Ultra-thin resist coating quality by increasing surface roughness of the substrate Christopher F. Lyons, Michael K. Templeton, Bhanwar Singh 2002-07-23
6420280 Method and system for reducing ARC layer removal by providing a capping layer for the ARC layer 2002-07-16
6417084 T-gate formation using a modified conventional poly process Bhanwar Singh, Ramkumar Subramanian, Christopher F. Lyons 2002-07-09