Issued Patents All Time
Showing 26–50 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7895509 | Error checking parity and syndrome of a block of data with relocated parity bits | Warren E. Cory, Steven P. Young | 2011-02-22 |
| 7882165 | Digital signal processing element having an arithmetic logic unit | James M. Simkins, Jennifer Wong, Bernard J. New, Alvin Y. Ching, John M. Thendean +2 more | 2011-02-01 |
| 7840630 | Arithmetic logic unit circuit | Anna Wing Wah Wong, Jennifer Wong, Bernard J. New, Alvin Y. Ching, John M. Thendean +2 more | 2010-11-23 |
| 7529993 | Method of selectively programming integrated circuits to compensate for process variations and/or mask revisions | — | 2009-05-05 |
| 7430703 | Error correction for multiple word read | — | 2008-09-30 |
| 7426678 | Error checking parity and syndrome of a block of data with relocated parity bits | Warren E. Cory, Steven P. Young | 2008-09-16 |
| 7420392 | Programmable gate array and embedded circuitry initialization and processing | Stephen M. Douglass, Steven P. Young, Nigel G. Herron, Mehul R. Vashi, Jane W. Sowards | 2008-09-02 |
| 7368940 | Programmable integrated circuit with selective programming to compensate for process variations and/or mask revisions | — | 2008-05-06 |
| 7314174 | Method and system for configuring an integrated circuit | Vasisht Mantra Vadi, Steven P. Young, Jennifer Wong | 2008-01-01 |
| 7286382 | Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability | Vasisht Mantra Vadi, Steven P. Young, Jennifer Wong | 2007-10-23 |
| 7283409 | Data monitoring for single event upset in a programmable logic device | Martin L. Voogel, Vasisht Mantra Vadi, Philip D. Costello, Venu M. Kondapalli | 2007-10-16 |
| 7233532 | Reconfiguration port for dynamic reconfiguration-system monitor interface | Vasisht Mantra Vadi, John D. Logue, John McGrath, Anthony J. Collins, F. Erich Goetting | 2007-06-19 |
| 7218137 | Reconfiguration port for dynamic reconfiguration | Vasisht Mantra Vadi, John D. Logue, John McGrath, Anthony J. Collins, F. Erich Goetting | 2007-05-15 |
| 7196940 | Method and apparatus for a multiplexed address line driver | Vasisht Mantra Vadi | 2007-03-27 |
| 7142442 | Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability | Vasisht Mantra Vadi, Steven P. Young, Jennifer Wong | 2006-11-28 |
| 7126372 | Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfiguration | Vasisht Mantra Vadi, John D. Logue, John McGrath, Anthony J. Collins, F. Erich Goetting | 2006-10-24 |
| 7109750 | Reconfiguration port for dynamic reconfiguration-controller | Vasisht Mantra Vadi, John D. Logue, John McGrath, Anthony J. Collins, F. Erich Goetting | 2006-09-19 |
| 7111217 | Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC) | — | 2006-09-19 |
| 7109746 | Data monitoring for single event upset in a programmable logic device | Martin L. Voogel, Vasisht Mantra Vadi, Philip D. Costello, Venu M. Kondapalli | 2006-09-19 |
| 7102555 | Boundary-scan circuit used for analog and digital testing of an integrated circuit | Anthony J. Collins, Neil G. Jacobson, Edward S. McGettigan, Bradley K. Fross | 2006-09-05 |
| 6781407 | FPGA and embedded circuitry initialization and processing | — | 2004-08-24 |
| 6526466 | Method and system for PLD swapping | Scott O. Frake, James McManus, Wilson K. Yee | 2003-02-25 |
| 6525562 | Programmable logic device capable of preserving state data during partial or complete reconfiguration | Lawrence C. Hung, F. Erich Goetting | 2003-02-25 |
| 6507211 | Programmable logic device capable of preserving user data during partial or complete reconfiguration | Lawrence C. Hung, F. Erich Goetting | 2003-01-14 |
| 6489837 | Digitally controlled impedance for I/O of an integrated circuit device | Suresh M. Menon, Eunice Y. D. Hao, Jason R. Bergendahl, Jian Tan | 2002-12-03 |